CS4239-JQ CIRRUS [Cirrus Logic], CS4239-JQ Datasheet - Page 53
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CS4239-JQ
Manufacturer Part Number
CS4239-JQ
Description
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
1.CS4239-JQ.pdf
(98 pages)
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Part Number:
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DIN/EEN
ICH
Block Power Down (X28)
Default = 00000000
This register and CTRLbase+2 access the same
data. See CTRLbase+2 for a detailed description of
each bit.
Power Management (X29)
Default = 0xxxx000
This register and C9 access the same data.
SPORT
DAC2
MIXCD
RESET
DS253PP2
RESET
PDWN
D7
D7
D6
res
SRC
D6
D5
VREF
res
D5
When read (DIN), this bit reflects
the SDA pin, which should be serial
data output from the Plug and Play
E
1 for this bit to function.
When written (EEN), enables the
E
onto the SCL/SDA pins. Writing:
0 - E
1 - E
Interrupt polarity - CDROM. When set,
the CDINT pin is an active high sig-
nal. When low, CDINT is an active
low signal. This bits can be initial-
ized through the Hardware
Configuration data.
Powers down the serial ports.
Powers down DAC2 including FM and
the CS9236 serial interface.
Powers down the analog mixer - with
the exception of MIN, AUX2, and the
line outputs.
When this bit goes from a 1 to a 0, a
software RESDRV is initiated caus-
ing the entire chip to be reset and
placed in its default power-up con-
figuration. Access to all registers on
2
2
PROM. EEN and DOUT must be
PROM interface: CLK and DOUT
D4
res
2
2
MIX
PROM interface disabled
PROM interface enabled
D4
D3
res
ADC1
D3
MIXCD DAC2
D2
DAC1 PROC
D2
D1
D1
SPORT
D0
D0
FM
Global Status (X30)
CTRLbase+7, Default = 1000000
X30 and CTRLbase+7 access the same data.
ZVA
IMV
WDT
IMPU
IWSS
ISB
ICTRL
CWSS
Reserved (X31)
Default = xxxxxxxx
res
CWSS
D7
res
D7
D6
ICTRL
res
CrystalClear Portable ISA Audio System
D6
D5
res
this chip will be lost, including this
one, since the power-up state for
PnP is all resources unassigned.
ZVPORT Active. When set, indicates
that data is being received on the
ZVPORT pins.
Hardware Master Volume Control
Interrupt Status. A hardware volume
control interrupt is pending when set
to 1. Master Volume Interrupts are
enabled through VCIE in C8/X24.
Watch-Dog Timer. If an error occurs
on the ISA bus, the Processor will
be reset and WDT will be set.
rupt pending when set to 1.
Status. WSS interrupt pending when
set to 1.
Sound Blaster Interrupt status. Sound
Blaster interrupt pending when set to
1.
Control Logical Device 2 Interrupt
status. A context switch interrupt is
pending when set to 1.
context.
0 - Sound Blaster Emulation
1 - Windows Sound System
Reserved. Could read as 0 or 1.
MPU-401 Interrupt status. MPU inter-
Windows Sound System Interrupt
Context - WSS. Indicates the current
D5
ISB
D4
TM
res
IWSS
D4
D3
res
IMPU
D3
D2
res
WDT IMV ZVA
D2 D1 D0
D1
res
CS4239
D0
res
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