CS42418_05 CIRRUS [Cirrus Logic], CS42418_05 Datasheet - Page 22

• Manufacturer Part Number: CS42418_05
• Description: 110 dB, 192 kHz 8-Ch Codec with PLL
• Manufacturer: CIRRUS [Cirrus Logic]

22
4.3.3
4.3.4
DAC_SDINx
Digital Volume and Mute Control
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to
-127 dB attenuation with 0.5 dB resolution. See
14h, 15h, 16h)” on page
0.125 dB at the rate controlled by the SZC[1:0] bits in the Digital Volume Control register. See
Transition Control (address 0Dh)” on page
Each output can be independently muted via mute control bits in the register
0Eh)” on page
value (-127 dB). When the XX_MUTE bit is disabled, the corresponding DAC returns to the attenuation
level set in the Volume Control register. The attenuation is ramped up and down at the rate specified by
the SZC[1:0] bits.
The Mute Control pin, MUTEC, is typically connected to an external mute control circuit. The Mute Control
pin outputs high impedance during Power-Up or in Power-Down Mode by setting the PDN bit in the reg-
ister
controlled by the user via the control port, or automatically asserted high when zero data is present on all
DAC inputs, or when serial port clock errors are present. To prevent large transients on the output, it is
desirable to mute the DAC outputs before the Mute Control pin is asserted. Please see the MUTEC pin
in the Pin Descriptions section for more information.
Each of the GPO1-GPO7 can be programmed to provide a hardware MUTE signal to individual circuits.
Each pin can be programmed as an output, with specific muting capabilities as defined by the function
bits in the register
ATAPI Specification
The CS42418 implements the channel-mixing functions of the ATAPI CD-ROM specification. The
ATAPI functions are applied per A-B pair. Refer to
mation.
“Power Control (address 02h)” on page 43
Right Channel
Left Channel
Audio Data
Audio Data
52. When enabled, each XX_MUTE bit attenuates the corresponding DAC to its maximum
“General-Purpose Pin Control (addresses 29h to 2Fh)” on page
Figure 9. ATAPI Block Diagram (x = channel pair 1, 2, 3, 4)
53. Volume control changes are programmable to ramp in increments of
Σ
51.
to a ‘1’. Once out of Power-Down Mode, the pin can be
“Volume Control (addresses 0Fh, 10h, 11h, 12h, 13h,
Table 14 on page 54
A Channel
B Channel
Volum e
Volum e
Control
Control
and
Σ
Figure 9
“Channel Mute (address
58.
for additional infor-
MUTE
MUTE
CS42418
AOUTAx
AOUTBx
DS603F1
“Volume