CS8164YT5 CHERRY [Cherry Semiconductor Corporation], CS8164YT5 Datasheet - Page 7
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CS8164YT5
Manufacturer Part Number
CS8164YT5
Description
8V/5V Low Dropout Dual Regulator with ENABLE
Manufacturer
CHERRY [Cherry Semiconductor Corporation]
Datasheet
1.CS8164YT5.pdf
(8 pages)
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the output at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage condi-
tions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor
will usually cost less and occupy less board space. If the
output oscillates within the range of expected operating
conditions, repeat steps 3 and 4 with the next larger stan-
dard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found for each output, a safety factor should be
added to allow for the tolerance of the capacitor and any
variations in regulator performance. Most good quality
aluminum electrolytic capacitors have a tolerance of +/-
20% so the minimum value found should be increased by
at least 50% to allow for this tolerance plus the variation
which will occur at low temperatures. The ESR of the
capacitors should be less than 50% of the maximum allow-
able ESR found in step 3 above.
Repeat steps 1 through 7 with the capacitor on the other
output, C
The maximum power dissipation for a dual output regula-
tor (Figure 1) is:
P
where:
D(max)
V
V
V
I
tion,
I
tion, and
I
I
OUT1(max)
OUT2(max)
Q
OUT(max)
IN(max)
OUT1(min)
OUT2(min)
is the quiescent current the regulator consumes at
= {V
3
is the maximum input voltage,
.
.
{V
IN(max)
is the maximum output current for the applica-
is the maximum output current for the applica-
is the minimum output voltage from V
is the minimum output voltage from V
IN(max)
in a Dual Output Linear Regulator
Calculating Power Dissipation
- V
- V
OUT1(min)
OUT2(min)
}I
}I
OUT1(max)
OUT2(max)
+
+V
IN(max)
Application Notes: continued
I
Q
OUT1
OUT2
(1)
,
,
7
Figure 1: Dual output regulator with key performance parameters
labeled.
Once the value of P
sible value of R
The value of R
package section of the data sheet. Those packages with
R
the die temperature below 150¡C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of R
where:
R
R
are functions of the package type, heatsink and the inter-
face between them. These values appear in heat sink data
sheets of heat sink manufacturers.
V
QJA
QJC
QJA
R
R
R
IN
QJC
QCS
QSA
's less than the calculated value in equation 2 will keep
, it too is a function of package type. R
appears in the package section of the data sheet. Like
= the junction-to-case thermal resistance,
= the case-to-heatsink thermal resistance, and
= the heatsink-to-ambient thermal resistance.
I
IN
QJA
R
QJA
QJA
can then be compared with those in the
can be calculated:
R
D(max)
= R
}
QJA
Control
Features
Regulator
QJC
=
Heat Sinks
Smart
is known, the maximum permis-
150¡C - T
+ R
QJA
I
:
QCS
P
Q
D
+ R
A
QSA
I
I
QCS
OUT1
OUT2
and R
V
V
QSA
OUT1
OUT2
(2)
(3)