CS43L41-KZ CIRRUS [Cirrus Logic], CS43L41-KZ Datasheet - Page 16

• Manufacturer Part Number: CS43L41-KZ
• Description: Low Power 24-Bit, 96 kHz DAC with Volume Control?
• Manufacturer: CIRRUS [Cirrus Logic]

4.3
4.4
16
DIF2
AMUTE
AMUTE
DEM1
0
0
0
0
1
1
1
1
7
7
0
0
1
1
DIGITAL INTERFACE FORMAT
DE-EMPHASIS CONTROL
Mode Control Register (address 01h)
Access:
Default:
Function:
Mode Control Register (address 01h)
Access:
Default:
Function:
Table 4. De-emphasis Filter Configurations
R/W in I
0 - Format 0 (I
The required relationship between the Left/Right clock, serial clock and serial data is defined by the
Digital Interface Format and the options are detailed in Figures 20-26.
R/W in I
0 - Disabled
Implementation of the standard 15 s/50 s digital de-emphasis filter response, Figure 27, requires re-
configuration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample
rates. NOTE: De-emphasis is not available in High-Rate Mode.
DIF1
0
0
1
1
0
0
1
1
DEMO
DIF2
DIF2
6
6
0
1
0
1
2
2
C and write only in SPI.
C and write only in SPI.
DIF0
0
1
0
1
1
0
1
0
2
S, up to 24-bit data, 64 x Fs Internal SCLK)
Disabled
44.1kHz
48kHz
32kHz
DIF1
DIF1
I
I
Left Justified, up to 24-bit data
Right Justified, 24-bit Data
Right Justified, 20-bit Data
Right Justified, 16-bit Data
Right Justified, 18-bit Data
Identical to Format 1
2
2
5
5
S, up to 24-bit data, 64 x Fs Internal SCLK
S, up to 24-bit data, 32 x Fs Internal SCLK
Table 3. Digital Interface Formats
DESCRIPTION
DIF0
DIF0
4
4
DESCRIPTION
DEM1
DEM1
3
3
DEM0
DEM0
2
2
POR
POR
FORMAT
1
1
0
1
2
7
3
4
5
6
CS43L41
DS473PP1
FIGURE
PDN
PDN
20
21
22
20
0
23
24
25
26
0