CS19208CBI AMCC [Applied Micro Circuits Corporation], CS19208CBI Datasheet

CS19208CBI

Manufacturer Part Number

CS19208CBI

Description

OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device

Manufacturer

AMCC [Applied Micro Circuits Corporation]

Datasheet

1.CS19208CBI.pdf (4 pages)

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Niagara

OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device

Final/Production ReleaseInformation - The information contained in this docu-

ment is about a product in its fully tested and characterized phase. All features

described herein are supported. Contact AMCC for updates to this document and

the latest product status.

Features

G.709 ODU - 2 Synchronous and Asynchronous mapping

G.709 ODU - 1 Synchronous and Asynchronous mapping

G.709 Overhead processing

Ingress and Egress SONET/SDH Performance Monitoring/

Injection

Industry Standard RS(255,239)

dB Coding Gain

• 1 x OC – 192/STM-64 mapping (239,237)

• Direct map (239,238) into ODU – 2

• 1 x OC – 48/STM-16 mapping (239,237)

• Direct map (239,238) into ODU – 1

• Bi-directional add-drop ODU – 1, ODU – 2

• Bi-direction G.709 Overhead Processing

• Dedicated GCC ports

• 1 x OC-192/48/12/3 TOH add-drop and processing

• 8B/10B Monitoring

• 10GE Monitoring

• SONET/SDH section and line termination

• TOH add-drop port

• LOS, OOF, LOF detection

• B1, B2 monitoring with programmable Signal Degrade and Signal

• J0 Monitoring, SDH and SONET modes

• Support for Protection Switching

• K1, K2 monitoring for APS changes, line AIS and line RDI

• Automatic, interrupt-driven, or manual AIS insertion

• Frame boundary output

• G.709 Compliant Frame Structure

• Compatible with AMCC S19203 (Hudson)

Fail thresholds

(at 10

-15

CER)

Forward Error Correction

OTN Network/Line

SFI-4 (10 GBPS)

Interface

8 or 16 uP I/F

Empowering Intelligent Optical Networks

Map

Analysis

PN gen

Pattern

Err Ins

& Err

BYPASS

Interrupt

Control

Decoder

Encoder

EFEC

Figure 1: Block Diagram

with 6.2

Ingress/EgressOD

U-2 OH Add/Drop

BYPASS

TOH Add/Drop

IngressEgress

SONET/SDH

OC-192

10GE

OC-192

Enhanced Gain Forward Error Correction with G.709 ODU

Broad Interface Compatibility

Client and Line side loop-back

Support For System Test and Diagnostics

General Purpose Processor Interface

Additional Protocol Support

Low Power .18 u CMOS Technology

• 2.5 Volt I/O

• 10.71, 10.66, and 11.1 Gbps enhanced FEC with >8dB coding gain

• G.709 overhead processing and nominal rate expansion

• Comprehensive channel statistics gathering

• Corrected bits, bytes

• Corrected zeros, ones (with outputs)

• Uncorrectable sub-frame count

• 16 bit, 622 Mbps LVDS interface (OIF MSA compliant) 10 Gbps

• Compatible with AMCC Hudson, Ganges, S3091/92, S3097/98,

• Client-side loopback on single 10 Gbps interface

• Line loopback on 10 Gbps interface

• Can synthesize SONET frame

• Error injection capability for verification of remote error reporting

• Test set compliant pseudo-random sequence generation/analysis

• Glueless interface to MPC860, 25 MHz to 52 MHz

• Dual Mode Interface also supports Intel processors

• Interrupt Driven or Polled mode operation

• FEC Frame Synchronous scrambling

• Programmable sequence detection

• 1.8 Volt core operation

10GE

interface

S19211, S3193/S3094, and S3474

Encoder

Decoder

FEC

R-S

BYPASS

Analysis

PN gen

Err Ins

Pattern

& Err

Client or OTN

SFI-4 (10 GBPS)

Part Number S19208CBI, Revision 1.4, Jan 2003

Interface

Product Brief

Related parts for CS19208CBI

CS19208CBI Summary of contents

Page 1

Niagara OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device Features G.709 ODU - 2 Synchronous and Asynchronous mapping • – 192/STM-64 mapping (239,237) • Direct map (239,238) into ODU – 2 G.709 ODU - 1 Synchronous and Asynchronous mapping ...

Page 2

Niagara OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device Applications • SONET/SDH OC-48/STM-16 OC-192/STM-64 DWDM transport systems and DWDM metro networks • Transparent Add-Drop Multiplexing Transponder applications • Protocol Transparent Transport • IaDI to IrDI FEC transponder chip (6.2dB gain network to ...

Page 3

Niagara OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device LEGACY COMPATIBILITY As indicated above, the Niagara also supports operation in the G.975 mode. In this mode, the G.709 overhead processing can be inhibited and direct access to the non-framing bytes in the ...

Page 4

Niagara OC-192/48/12/3 DW/FEC/PM and ASYNC Mapper Device Figure 3: OC-48/STM16 (and below) to OTU-1 Edge Tran- sponder Figure 3 shows the Niagara in an edge transponder applica- tion. An AMCC S3474 CMOS Dual-SerDes with Continuous mode operation provides the interface ...

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