ST6200 STMICROELECTRONICS [STMicroelectronics], ST6200 Datasheet - Page 47

• Manufacturer Part Number: ST6200
• Description: 8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

8-BIT TIMER (Cont’d)
8.2.6 Register Description
PRESCALER COUNTER REGISTER (PSCR)
Address: 0D2h - Read/Write
Reset Value: 0111 1111 (7Fh)
Bit 7 = PSCR7: Not used, always read as “0”.
Bits 6:0 = PSCR[6:0] Prescaler LSB.
TIMER COUNTER REGISTER (TCR)
Address: 0D3h - Read / Write
Reset Value: 1111 1111 (FFh)
Bits 7:0 = TCR[7:0] Timer counter bits.
TIMER STATUS CONTROL REGISTER (TSCR)
Address: 0D4h - Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = TMZ Timer Zero bit.
A low-to-high transition indicates that the timer
count register has underflowed. It means that the
TCR value has changed from 00h to FFh.
This bit must be cleared by user software.
0: Counter has not underflowed
1: Counter underflow occurred
Table 13. 8-Bit Timer Register Map and Reset Values
PSCR
TCR7
TMZ
Address
(Hex.)
7
7
7
7
0D2h
0D3h
0D4h
PSCR
TCR6
ETI
6
PSCR
Reset Value
TCR
Reset Value
TSCR
Reset Value
TSCR5 TSCR4
PSCR
TCR5
Register Label
5
PSCR
TCR4
4
PSCR
TCR3
PSI
3
PSCR
TCR2
PSCR7
PS2
TCR7
TMZ
2
7
0
1
0
PSCR
TCR1
PS1
1
PSCR6
TCR6
ETI
6
1
1
0
PSCR
TCR0
PS0
0
0
0
0
PSCR5
TSCR5
TCR5
5
1
1
0
Bit 6 = ETI Enable Timer Interrupt.
When set, enables the timer interrupt request. If
ETI=0 the timer interrupt is disabled. If ETI=1 and
TMZ=1 an interrupt request is generated.
0: Interrupt disabled (reset state)
1: Interrupt enabled
Bit 5 = TSCR5 Reserved, must be set.
Bit 4 = TSCR4 Reserved, must be cleared.
Bit 3 = PSI: Prescaler Initialize bit.
Used to initialize the prescaler and inhibit its count-
ing. When PSI=“0” the prescaler is set to 7Fh and
the counter is inhibited. When PSI=“1” the prescal-
er is enabled to count downwards. As long as
PSE=“1” both counter and prescaler are not run-
ning
0: Counting disabled
1: Counting enabled
Bits 1:0 = PS[2:0] Prescaler Mux. Select.
These bits select the division ratio of the prescaler
register.
Table 12. Prescaler Division Factors
PS2
PSCR4
TSCR4
0
0
0
0
1
1
1
1
TCR4
4
1
1
0
PSCR3
TCR3
ST6200C/ST6201C/ST6203C
PSI
3
1
1
0
PS1
1
0
0
1
1
0
0
1
PSCR2
TCR2
PS2
2
1
1
0
PS0
1
0
1
0
1
0
1
0
PSCR1
TCR1
PS1
1
1
1
0
Divided by
PSCR0
128
16
32
64
TCR0
8
1
2
4
PS0
47/100
0
1
1
0
1