LT4356CDE-3 LINER [Linear Technology], LT4356CDE-3 Datasheet - Page 13
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LT4356CDE-3
Manufacturer Part Number
LT4356CDE-3
Description
Surge Stopper with Fault Latchoff
Manufacturer
LINER [Linear Technology]
Datasheet
1.LT4356CDE-3.pdf
(24 pages)
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APPLICATIONS INFORMATION
This fi xed early warning period allows the systems to per-
form necessary backup or house keeping functions before
the power supply is cut off. After V
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after V
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2μA
current discharges the timer capacitor back to 0.5V. Once
the TMR pin returns to 0.5V, the fault condition may be
reset by pulling SHDN low for at least 100μs and pulled
high with a slew rate faster than 10V/ms. The FLT output
goes high when the fault condition is reset.
MOSFET Selection
The LT4356-3 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance R
V
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 16V for those applications with V
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with V
(BR)DSS
, the threshold voltage, and the SOA.
DS(ON)
, the maximum drain-source voltage
TMR
has reached 1.25V threshold,
V
IN
TMR
crosses the 1.35V
Figure 3. Prototypical Transient Waveform
t
r
V
PK
CC
less
CC
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regu-
late either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356-3 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifi cations use the model shown
in Figure 3. The idealized waveform comprises a linear
ramp of rise time t
exponentially decaying back to V
of t. A common automotive transient specifi cation has
constants of t
condition known as “load dump” has constants of t
V
PK
= 60V and τ = 200ms.
r
= 10μs, V
r
, reaching a peak voltage of V
43563 F03
PK
= 80V and τ = 1ms. A surge
IN
with a time constant
LT4356-3
r
13
= 5ms,
PK
43563f
and