AS1324 AMSCO [austriamicrosystems AG], AS1324 Datasheet - Page 8

• Manufacturer Part Number: AS1324
• Description: 1.5MHz, 600mA, DC/DC Step-Down Regulator
• Manufacturer: AMSCO [austriamicrosystems AG]

AS1324
Data Sheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1324 is a high-efficiency buck converter that uses a constant-frequency current-mode architecture. The device
contains two internal MOSFET switches and is available in adjustable- and fixed-output voltage versions.
Figure 21. Block Diagram
Main Control Loop
During PWM operation the converters use a 1.5MHz fixed-frequency, current-mode control scheme. Basis of the cur-
rent-mode PWM controller is an open-loop, multiple input comparator that compares the error-amp voltage feedback
signal against the sum of the amplified current-sense signal and the slope-compensation ramp. At the beginning of
each clock cycle, the internal high-side PMOS turns on until the PWM comparator trips. During this time the current in
the inductor ramps up, sourcing current to the output and storing energy in the inductor’s magnetic field. When the
PMOS turns off, the internal low-side NMOS turns on. Now the inductor releases the stored energy while the current
ramps down, still providing current to the output. The output capacitor stores charge when the inductor current
exceeds the load and discharges when the inductor current is lower than the load. Under overload conditions, when
the inductor current exceeds the current limit, the high-side PMOS is turned off and the low-side NMOS remains on
until the next clock cycle.
When the PMOS is off, the NMOS is turned on until the inductor current starts to reverse (as indicated by the current
reversal comparator (IRCMP)), or the next clock cycle begins. The IRCMP detects the zero crossing.
The peak inductor current (I
to the internal 0.6V reference, causing the error amplifier’s output voltage to increase until the average inductor current
matches the new load current.
The over-voltage detection comparator (OVDET) guards against transient overshoots by turning the main switch off
and keeping it off until the transient is removed.
www.austriamicrosystems.com
V
OUT
/V
EN
FB
5
1
Reference
R
R
1
2
Not applicable to AS1324
AS1324-12: R
AS1324-15: R
AS1324-18: R
0.6V
Frequency
OSC
Shift
Shutdown
FB
PK
) is controlled by the error amplifier. When I
0.6V +
ΔV
ΔV
0.6V -
0.6V
1
1
1
OVL
OVL
+ R
+ R
+ R
2
2
2
OSCN
Compensator
= 600kΩ
= 750kΩ
= 900kΩ
Ramp
–
OVDET
+
–
+
+
Error
–
Amp
Revision 1.03
Digital
Logic
AS1324
IRCMP
Through
–
+
ICOMP
Shoot
Anti-
OUT
+
–
increases, V
NMOS
PMOS
FB
decreases slightly relative
4
V
3
SW
2
GND
IN
4.7µH
10µF
C
IN
V
V
OUT
C
8 - 20
10µF
IN
OUT