AD5412ACPZ AD [Analog Devices], AD5412ACPZ Datasheet - Page 22

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AD5412ACPZ

Manufacturer Part Number
AD5412ACPZ
Description
Single Channel, 12/16-Bit, Serial Input, Current Source & Voltage Output DAC
Manufacturer
AD [Analog Devices]
Datasheet

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AD5412/AD5422
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy, or integral nonlinearity (INL), is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer
function. A typical INL vs. code plot can be seen in Figure 7.
Differential Nonlinearity (DNL)
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ±1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. A typical DNL vs. code plot can be seen
in Figure 10.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant for increasing digital input code. The AD5724R/
AD5734R/AD5754R are monotonic over their full operating
temperature range.
Bipolar Zero Error
Bipolar zero error is the deviation of the analog output from the
ideal half-scale output of 0 V when the DAC register is loaded
with 0x8000 (straight binary coding) or 0x0000 (twos complement
coding). A plot of bipolar zero error vs. temperature can be seen
in Figure TBD.
Bipolar Zero TC
Bipolar zero TC is a measure of the change in the bipolar zero
error with a change in temperature. It is expressed in ppm
FSR/°C.
Full-Scale Error
Full-Scale error is a measure of the output error when full-scale
code is loaded to the DAC register. Ideally, the output should be
full-scale − 1 LSB. Full-scale error is expressed in percent of
full-scale range (% FSR).
Negative Full-Scale Error/Zero-Scale Error
Negative full-scale error is the error in the DAC output voltage
when 0x0000 (straight binary coding) or 0x8000 (twos
complement coding) is loaded to the DAC register. Ideally, the
output voltage should be negative full-scale − 1 LSB. A plot of
zero-scale error vs. temperature can be seen in Figure TBD
Zero-Scale TC
This is a measure of the change in zero-scale error with a change in
temperature. Zero-scale error TC is expressed in ppm FSR/°C.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for
the output to settle to a specified level for a full-scale input
change. A plot of settling time can be seen in Figure TBD
Rev. PrF | Page 22 of 38
Slew Rate
The slew rate of a device is a limitation in the rate of change of
the output voltage. The output slewing speed of a voltage-
output D/A converter is usually limited by the slew rate of the
amplifier used at its output. Slew rate is measured from 10% to
90% of the output signal and is given in V/µs.
Gain Error
This is a measure of the span error of the DAC. It is the
deviation in slope of the DAC transfer characteristic from ideal
expressed in % FSR. A plot of gain error vs. temperature can be
seen in Figure TBD
Gain TC
This is a measure of the change in gain error with changes in
temperature. Gain Error TC is expressed in ppm FSR/°C.
Total Unadjusted Error
Total unadjusted error (TUE) is a measure of the output error
taking all the various errors into account, namely INL error,
offset error, gain error, and output drift over supplies,
temperature, and time. TUE is expressed in % FSR.
Current Loop Voltage Compliance
The maximum voltage at the I
currnet will be equal to the programmed value.
Power-On Glitch Energy
Power-on glitch energy is the impulse injected into the analog
output when the AD5412/AD5422 is powered-on. It is specified as
the area of the glitch in nV-sec. See Figure TBD
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state, but the output voltage remains constant. It is normally
specified as the area of the glitch in nV-sec and is measured
when the digital input code is changed by 1 LSB at the major
carry transition (0x7FFF to 0x8000). See Figure TBD
Glitch Impulse Peak Amplitude
Glitch impulse peak amplitude is the peak amplitude of the
impulse injected into the analog output when the input code in
the DAC register changes state. It is specified as the amplitude
of the glitch in mV and is measured when the digital input code
is changed by 1 LSB at the major carry transition (0x7FFF to
0x8000). See Figure TBD.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC, but is measured when the DAC output is not updated. It
is specified in nV-sec and measured with a full-scale code
change on the data bus.
Power Supply Rejection Ratio (PSRR)
PSRR indicates how the output of the DAC is affected by
changes in the power supply voltage.
Reference TC
Preliminary Technical Data
OUT
pin for which the output

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