AD5516-3 AD [Analog Devices], AD5516-3 Datasheet - Page 10

• Manufacturer Part Number: AD5516-3
• Description: 16-Channel, 12-Bit Voltage-Output DAC with 14-Bit Increment Mode
• Manufacturer: AD [Analog Devices]

AD5516
FUNCTIONAL DESCRIPTION
The AD5516 consists of sixteen 12-bit DACs in a single package.
A single reference input pin (REF_IN) is used to provide a 3 V
reference for all 16 DACs. To update a DAC’s output voltage
the required DAC is addressed via the 3-wire serial interface.
Once the serial write is complete, the selected DAC converts the
code into an output voltage. The output amplifiers translate the
DAC output range to give the appropriate voltage range (± 2.5 V,
± 5 V, or ± 10 V) at output pins V
The AD5516 uses a self-calibrating architecture to achieve
12-bit performance. The calibration routine servos to select the
appropriate voltage level on an internal 14-bit resolution DAC.
Noise during the calibration (BUSY low period) can result in
the selection of a voltage within a ± 0.25 LSB band around the
normal selected voltage. See TPC 10.
It is essential to minimize noise on REFIN for optimal perfor-
mance. The AD780’s specified decoupling makes it the ideal
reference to drive the AD5516.
On power-on, all DACs power up to a reset value (see RESET
section).
DIGITAL-TO-ANALOG SECTION
The architecture of each DAC channel consists of a resistor-
string DAC followed by an output buffer amplifier. The voltage
at the REF_IN Pin provides the reference voltage for the corre-
sponding DAC. The input coding to the DAC is offset binary;
this results in ideal DAC output voltages as follows:
AD5516-1
AD5516-2
AD5516-3
Where:
D = decimal equivalent of the binary code that is loaded to
N = DAC resolution = 12
the DAC register, i.e., 0–4096
V
V
V
DAC
DAC
DAC
=
=
=
MSB
2
8
MSB
MSB
4
0
0
1
MODE
×
×
×
MODE
MODE
BITS
BITS
BITS
V
V
V
REF IN
REF IN
REF IN
0
1
0
3 2
3 2
3 2
_
_
_
×
×
×
A3
A3
A3
OUT
×
×
×
N
N
N
2 5
2 5
2 5
ADDRESS
0 to V
ADDRESS
ADDRESS
.
.
.
A2
A2
A2
BITS
BITS
BITS
×
×
×
D
D
D
A1
A1
A1
OUT
–
–
–
V
2
4
15.
A0
A0
A0
REF IN
V
V
REF IN
REF IN
_
DB11 DB10 DB9
3
_
_
0
0
3
3
×
2 5
×
×
.
0
0
2 5
2 5
.
.
0
0
DB8
0
0
Table I illustrates ideal analog output versus DAC code.
MODES OF OPERATION
The AD5516 has two modes of operation.
Mode 1 (MODE bits = 00): The user programs a 12-bit data
word to one of 16 channels via the serial interface. This word is
loaded into the addressed DAC register and is then converted
into an analog output voltage. During conversion the BUSY
output is low and all SCLK pulses are ignored. At the end of a
conversion BUSY goes high indicating that the update of the
addressed DAC is complete. It is recommended that SCLK is
not pulsed while BUSY is low. Mode 1 conversion takes 25 µs typ.
Mode 2 (MODE bits = 01 or 10): Mode 2 operation allows the
user to increment or decrement the DAC output in 0.25 LSB steps,
resulting in a 14-bit monotonic DAC. The amount by which the
DAC output is incremented or decremented is determined by
Mode 2 bits DB6–DB0, e.g., for a 0.25 LSB increment/decrement
DB6...DB0 = 0000001, while for a 2.5 LSB increment/decrement,
DB6...DB0 = 0001010. The MODE bits determine whether the
DAC data is incremented (01) or decremented (10). The maximum
amount that the user is allowed to increment or decrement the DAC
output is 127 steps of 0.25 LSB, i.e., DB6...DB0 = 1111111.
Mode 2 update takes approximately 1 µs. The Mode 2 feature
allows increased resolution but overall increment/decrement accu-
racy varies with increment/decrement step as shown in TPC 14.
Mode 2 is useful in applications where greater resolution is
required, for example, in servo applications requiring fine-tune
to 14-bit resolution.
DB7
0
0
MSB
1111 1111 1111
1000 0000 0000
0000 0000 0000
DB6
DB6
DB6
Table I. DAC Register Contents AD5516-1
DATA
BITS
DB5
DB5
DB5
LSB
DB4
DB4
DB4
7 DECREMENT
7 INCREMENT
DB3
DB3
BITS
DB3
BITS
DB2
DB2
DB2
Analog Output, V
V
0 V
–V
REF_IN
REF_IN
DB1
DB1
DB1
× 2.5/3 – 1 LSB
× 2.5/3
DB0
DB0
DB0
LSB
LSB
LSB
OUT