LTC2259-16 LINER [Linear Technology], LTC2259-16 Datasheet - Page 19

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LTC2259-16

Manufacturer Part Number
LTC2259-16
Description
16-Bit, 80Msps Ultralow Power 1.8V ADC
Manufacturer
LINER [Linear Technology]
Datasheet
APPLICATIONS INFORMATION
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable. Digital interference may be from capacitive or
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
The digital output is randomized by applying an exclusive-
OR logic operation between D2 and all other data output
bits. To decode, the reverse operation is applied—an ex-
clusive-OR operation is applied between D2 and all other
bits. The D2 and CLKOUT outputs are not affected. The
output randomizer is enabled by serially programming
mode control register A4.
Figure 15. Functional Equivalent of Digital Output Randomizer
RANDOMIZER
ON
D2
CLKOUT
D15
D14
D3
D2
D1
D0
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CLKOUT
D15
D14
D3
D2
D1
D0
D2
D2
D2
D2
D2
Alternate Bit Polarity
Another feature that reduces digital feedback on the circuit
board is the alternate bit polarity mode. When this mode
is enabled, all of the odd bits (D1, D3, D5, D7, D9, D11,
D13, D15) are inverted before the output buffers. The even
bits (D0, D2, D4, D6, D8, D10, D12, D14) and CLKOUT are
not affected. This can reduce digital currents in the circuit
board ground plane and reduce digital noise, particularly
for very small analog input signals.
When there is a very small signal at the input of the A/D
that is centered around mid-scale, the digital outputs toggle
between mostly 1s and mostly 0s. This simultaneous
switching of most of the bits will cause large currents in
the ground plane. By inverting every other bit, the alter-
nate bit polarity mode makes half of the bits transition
high while half of the bits transition low. To fi rst order,
this cancels current fl ow in the ground plane, reducing
the digital noise.
Figure 16. De-Randomizing a Randomized
Digital Output Signal
PC BOARD
LTC2259-16
D15
D14
D3
D1
D0
CLKOUT
D2
D2
D2
D2
D2
D2
FPGA
LTC2259-16
D15
D14
D3
D2
D1
D0
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