LTC2637-HMI10 LINER [Linear Technology], LTC2637-HMI10 Datasheet - Page 21

• Manufacturer Part Number: LTC2637-HMI10
• Manufacturer: LINER [Linear Technology]

OPERATION
Write Word Protocol
The master initiates communication with the LTC2637
with a START condition and a 7-bit slave address followed
by the Write bit (W) = 0. The LTC2637 acknowledges by
pulling the SDA pin low at the 9th clock if the 7-bit slave
address matches the address of the part (set by CA0, CA1
or CA2) or the global address. The master then transmits
three bytes of data. The LTC2637 acknowledges each byte
of data by pulling the SDA line low at the 9th clock of each
data byte transmission. After receiving three complete bytes
of data, the LTC2637 executes the command specifi ed in
the 24-bit input word.
If more than three data bytes are transmitted after a valid
7-bit slave address, the LTC2637 does not acknowledge the
extra bytes of data (SDA is high during the 9th clock).
The format of the three data bytes is shown in Figure
3. The fi rst byte of the input word consists of the 4-bit
command, followed by the 4-bit DAC address. The next
two bytes contain the 16-bit data word, which consists
of the 12-, 10- or 8-bit input code, MSB to LSB, followed
by 4, 6 or 8 don’t-care bits (LTC2637-12, LTC2637-10
and LTC2637-8, respectively). A typical LTC2637 write
transaction is shown in Figure 4.
The command bit assignments (C3-C0) and address (A3-
A0) assignments are shown in Tables 3 and 4. The fi rst
four commands in the table consist of write and update
operations. A write operation loads a 16-bit data word
from the 32-bit shift register into the input register. In an
update operation, the data word is copied from the input
register to the DAC register. Once copied into the DAC
register, the data word becomes the active 12-, 10-, or
8-bit input code, and is converted to an analog voltage at
the DAC output. Write to and Update combines the fi rst
two commands. The Update operation also powers up the
DAC if it had been in power-down mode. The data path
and registers are shown in the Block Diagram.
Table 3. Command Codes
*Command codes not shown are reserved and should not be used.
Table 4. Address Codes
*Address codes not shown are reserved and should not be used.
Reference Modes
For applications where an accurate external reference is
either not available, or not desirable due to limited space,
the LTC2637 has a user-selectable, integrated reference.
The integrated reference voltage is internally amplifi ed
by 2x to provide the full-scale DAC output voltage range.
C3
A3
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
ADDRESS (n)*
COMMAND*
C2
A2
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
C1
A1
0
0
1
1
0
0
1
1
1
0
0
1
1
0
0
1
1
1
C0
A0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
Write to Input Register n
Update (Power Up) DAC Register n
Write to Input Register n, Update (Power Up) All
Write to and Update (Power Up) DAC Register n
Power Down n
Power Down Chip (All DAC’s and Reference)
Select Internal Reference (Power Up Reference)
Select External Reference (Power Down Internal
Reference)
No Operation
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
DAC H
All DACs
LTC2637
21
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