CY7B9911 Cypress Semiconductor, CY7B9911 Datasheet - Page 2

• Manufacturer Part Number: CY7B9911
• Description: High-Speed Low-Voltage Programmable Skew Clock Buffer LV-PSCB
• Manufacturer: Cypress Semiconductor

Pin Definitions
Block Diagram Description
Phase Frequency Detector and Filter
These two blocks accept inputs from the Reference Frequency
(REF) input and the Feedback (FB) input and generate correc-
tion information to control the frequency of the Voltage-
Controlled Oscillator (VCO). These blocks, along with the
VCO, form a Phase-Locked Loop (PLL) that tracks the incom-
ing REF signal.
VCO and Time Unit Generator
The VCO accepts analog control inputs from the PLL filter
block and generates a frequency that is used by the time unit
generator to create discrete time units that are selected in the
skew select matrix. The operational range of the VCO is deter-
mined by the FS control pin. The time unit (t
by the operating frequency of the device and the level of the
FS pin as shown in Table 1.
Table 1. Frequency Range Select and t
Notes:
1.
2.
3.
REF
FB
FS
1F0, 1F1
2F0, 2F1
3F0, 3F1
4F0, 4F1
TEST
1Q0, 1Q1
2Q0, 2Q1
3Q0, 3Q1
4Q0, 4Q1
V
V
GND
FS
LOW
MID
HIGH
Signal Name
CCN
CCQ
[2, 3]
For all three-state inputs, HIGH indicates a connection to V
circuitry holds an unconnected input to V
The level to be set on FS is determined by the “normal” operating frequency (f
frequency (f
REF and FB inputs will be f
is configured for a frequency multiplication by using a divided output as the FB input.
When the FS pin is selected HIGH, the REF input must not transition upon power-up until V
f
Min. Max.
NOM
15
25
40
NOM
(MHz)
) always appears at 1Q0 and the other outputs when they are operated in their undivided modes (see Table 2). The frequency appearing at the
110
30
50
PWR
PWR
PWR
I/O
O
O
O
O
I
I
I
I
I
I
I
I
t
U
where N =
NOM
=
when the output connected to FB is undivided. The frequency of the REF and FB inputs will be f
Reference frequency input. This input supplies the frequency and timing against which all functional
variation is measured.
PLL feedback input (typically connected to one of the eight outputs).
Three-level frequency range select. See Table 1.
Three-level function select inputs for output pair 1 (1Q0, 1Q1). See Table 2.
Three-level function select inputs for output pair 2 (2Q0, 2Q1). See Table 2.
Three-level function select inputs for output pair 3 (3Q0, 3Q1). See Table 2.
Three-level function select inputs for output pair 4 (4Q0, 4Q1). See Table 2.
Three-level select. See test mode section under the block diagram descriptions.
Output pair 1. See Table 2.
Output pair 2. See Table 2.
Output pair 3. See Table 2.
Output pair 4. See Table 2.
Power supply for output drivers.
Power supply for internal circuitry.
Ground.
----------------------- -
f
44
26
16
NOM
1
N
CC
/2.
Frequency (MHz) At
Which t
U
Approximate
Calculation
U
) is determined
22.7
38.5
62.5
U
CC
= 1.0 ns
, LOW indicates a connection to GND, and MID indicates an open connection. Internal termination
[1]
2
NOM
Skew Select Matrix
The skew select matrix is comprised of four independent sec-
tions. Each section has two low-skew, high-fanout drivers
(xQ0, xQ1), and two corresponding three-level function select
(xF0, xF1) inputs. Table 2 below shows the nine possible out-
put functions for each section as determined by the function
select inputs. All times are measured with respect to the REF
input assuming that the output connected to the FB input has
0t
Table 2. Programmable Skew Configurations
LOW
LOW
LOW
MID
MID
MID
HIGH
HIGH
HIGH
1F1, 2F1,
3F1, 4F1
U
) of the V
Function Selects
selected.
Description
CO
CC
has reached 2.8V.
and Time Unit Generator (see Logic Block Diagram). Nominal
1F0, 2F0,
LOW
MID
HIGH
LOW
MID
HIGH
LOW
MID
HIGH
3F0, 4F0
1Q0, 1Q1,
2Q0, 2Q1
–4t
–3t
–2t
–1t
+1t
+2t
+3t
+4t
0t
U
U
U
U
U
U
U
U
U
3.3V RoboClock+
Output Functions
Divide by 2 Divide by 2
Divide by 4
NOM
3Q0, 3Q1
–6t
–4t
–2t
+2t
+4t
+6t
/2 or f
0t
CY7B9911V
U
U
U
U
U
U
U
NOM
/4 when the part
[1]
4Q0, 4Q1
Inverted
–6t
–4t
–2t
+2t
+4t
+6t
0t
U
U
U
U
U
U
U