SY10E136 Micrel Semiconductor, SY10E136 Datasheet - Page 7

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SY10E136

Manufacturer Part Number
SY10E136
Description
6-BIT UNIVERSAL UP/DOWN COUNTER
Manufacturer
Micrel Semiconductor
Datasheet

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Micrel
becomes simply determining what value to load into the
counter to accomplish the desired division. Since the load
operation requires a clock pulse, to divide by N, N-1 must
be loaded into the counter. A single E136 device is capable
of divide ratios of 2 to 64, inclusive. Table 1 outlines the
load values for the various divide ratios. Figure 4 presents
the waveforms resulting from a divide by 37 operation. Note
that the availability of the C
allows the user to choose the polarity of the divide by output.
counter is probably a better choice than the E136. The
E016 has an internal feedback to control the reloading of
the counter. This not only simplifies board design, but also
will result in a faster maximum count frequency.
CLOCK
The exercise of building a programmable divider then
For single device programmable counters, the E016
For programmable dividers of larger than 8 bits, the
C
CLOCK
OUT
S1
"LO"
"LO"
C
CL
CLK
IN
IN
D0 – D5
Q
LSB
0
– Q
LOAD
OUT
CL
C
5
OUT
OUT
complimentary output (C
S
1
100100
Figure 5. 24-bit Programmable Divider Architecture
"LO"
Figure 4. Programmable Divider Waveforms
C
CL
CLK
IN
IN
D0 – D5
Q
100011
0
– Q
CL
5
C
OUT
OUT
OUT
S
1
)
DIVIDE BY 37
7
000011
benefits of the E016 diminishes and, in fact, for very wide
dividers, the E136 will provide the capability of a faster
count frequency. Figure 5 shows the architecture of a 24-
bit programmable divider implemented using E136 counters.
Note the need for one external gate to control the loading of
the entire counter chain. An ideal device for the external
gating of this architecture would be the 4-input OR function
in the 8-lead SOIC ECLinPS Lite™ family. However, the
final decision as to what device to use for external gating
requires a balancing of performance needs, cost and
available board space. Note that because of the need for
external gating, the maximum count frequency of a given
sized programmable divider will be less than that of a single
cascaded counter.
C
CL
CLK
IN
000010
IN
D0 – D5
Q
0
– Q
CL
5
C
OUT
OUT
S
1
000001
000000
C
CL
CLK
IN
IN
Q
D0 – D5
0
MSB
– Q
CL
5
C
OUT
OUT
S
LOAD
1
SY100E136
SY10E136

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