X1288 Xicor, X1288 Datasheet - Page 17
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X1288
Manufacturer Part Number
X1288
Description
2-Wire RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
Manufacturer
Xicor
Datasheet
1.X1288.pdf
(31 pages)
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Figure 4. Watchdog Restart/Time Out
Preliminary Information
Watchdog Timer Restart
The Watchdog Timer is started by a falling edge of
SDA when the SCL line is high and followed by a stop
bit. The start signal restarts the watchdog timer
counter, resetting the period of the counter back to the
maximum. If another start fails to be detected prior to
the watchdog timer expiration, then the RESET pin
becomes active. In the event that the start signal
occurs during a reset time out period, the start will
have no effect. When using a single START to refresh
watchdog timer, a STOP bit should be followed to reset
the device back to stand-by mode.
LOW VOLTAGE RESET OPERATION
When a power failure occurs, and the voltage to the
part drops below a fixed v
issued to the host microcontroller. The circuitry moni-
tors the V
senses a preset threshold voltage. Power up and
power down waveforms are shown in Figure 5. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
When the low voltage reset signal is active, the opera-
tion of any in progress nonvolatile write cycle is unaf-
fected, allowing a nonvolatile write to continue as long
as possible (down to the power on reset voltage). The
low voltage reset signal, when active, terminates in
progress communications to the device and prevents
new commands, to reduce the likelihood of data cor-
ruption.
REV 1.1.30 3/24/04
RESET
CC
SDA
SCL
line with a voltage comparator which
Start
TRIP
Note: All inputs are ignored during the active reset period (t
t
RSP
voltage, a reset pulse is
t
RSP
<t
WDO
Stop Start
www.xicor.com
t
RSP
>t
WDO
V
The X1288 is shipped with a standard V
(V
operating and storage conditions. However, in applica-
tions where the standard V
higher precision is needed in the V
X1288 threshold may be adjusted. The procedure is
described below, and uses the application of a nonvol-
atile write control signal.
Setting the V
It is necessary to reset the trip point before setting the
new value.
To set the new V
threshold voltage to the V
to the programming voltage V
address 01h. The stop bit following a valid write opera-
tion initiates the V
RESET to V
operation may take up to 10 milliseconds to complete
and also writes 00h to address 01h of the EEPROM
array.
Resetting the V
This procedure is used to set the V
voltage level. For example, if the current V
and the new V
be reset. When V
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
CC
TRIP
THRESHOLD RESET PROCEDURE [Optional]
) voltage. This value will not change over normal
t
RST
CC
TRIP
TRIP
RST
TRIP
to complete the operation. Note: this
TRIP
TRIP
).
Voltage
TRIP
must be 4.0V, then the V
t
Voltage
RSP
voltage, apply the desired V
is reset, the new V
programming sequence. Bring
>t
CC
WDO
TRIP
pin and tie the RESET pin
P
. Then write data 00h to
is not exactly right, or if
t
RST
TRIP
TRIP
TRIP
CC
to a “native”
TRIP
value, the
TRIP
X1288
threshold
is some-
is 4.4V
17 of 31
must
TRIP