ICL7134 Intersil, ICL7134 Datasheet - Page 11

• Manufacturer Part Number: ICL7134
• Description: 14-Bit Multiplying Microprocessor-Compatible D/A Converter
• Manufacturer: Intersil

negative excursions which could damage the device, and is
only necessary with certain high spped amplifiers. For
applications where the output reference ground point is
established somewhere other than at the DAC, the circuit of
Figure 9 can be used. Here, op-amp A
error due to IR voltage drop between the internal Analog
GrouND node and the external ground connection. For
13-bit or lower accuracy, omit A
AGND
possible.
FIGURE 8. UNIPOLAR BINARY, TWO-QUADRANT
FIGURE 9. UNIPOLAR BINARY OPERATION WITH FORCED
S
directly to ground through as low a resistance as
MULTIPLYING CIRCUIT
GROUND
2
and connect AGND
2
removes the slight
F
ICL7134
and
11
Zero Offset Adjustment
1. Connect all data inputs and WR, CS, A
2. Adjust offset zero-adjust trim-pot of the operational ampli-
3. Adjust the offset zero-adjust trim-pot of the output
Gain Adjustment (Optional)
1. Connect all data inputs to V+, connect WR, CS, A
2. Monitor V
3. To decrease V
4. To increase V
Bipolar (2’s Complement) Operation (ICL7134B)
The circuit configuration for bipolar mode operation
(ICL7134B) is shown in Figure 10. Using 2’s complement
digital input codes and positive and negative reference
voltage values, four-quadrant multiplication is obtained. The
“digital input code/analog output value” table for bipolar
mode is given in Table 3. Amplifier A
resistors R
circuit. The MSB ladder leg sees a reference input of
approximately -V
the polarity of the other bits. In addition, the ICL7134B’s
feedback resistance is switched to 2R under PROM control,
so that the bipolar output range is +V
1/2
used if necessary.
TABLE 3. CODE TABLE - BIPOLAR (2’S COMPLEMENT)
1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0 0 0 0 0 0 0
TABLE 2. CODE TABLE - UNIPOLAR BINARY OPERATION
DGND.
fier A
op-amp, A
to DGND.
between the reference voltage and the V
terminals (pins 20 and 18).
between A
13
). Again, the grounding arrangement of Figure 9 can be
2
, if used, for a maximum of 0V ±50µV at AGND
OPERATION
DIGITIAL INPUT
DIGITAL INPUT
INV1
OUT
1
1
, for a maximum of 0V ±50µV at V
output and the R
and R
OUT
for a -V
OUT
REF
, connect a series resistor of 5Ω or less
, so the MSB’s weight is reversed from
, connect a series resistor of 5Ω or less
INV2
REF
, forms a simple voltage inverter
(1 - 1/2
FB
terminal (pin 21).
14
3
-V
-V
-V
-V
-V
0
-V
-V
0
V
V
V
, together with internal
REF
REF
REF
) reading.
REF
REF
REF
REF
REF
REF
REF
ANALOG OUTPUT
ANALOG OUTPUT
REF
/2
(1/2
(1 - 1/2
(1 - 1/2
(1/2 + 1/2
(1/2 - 1/2
(1/2
(1 - 1/2
(1/2
RFM
to -V
13
14
0
13
)
OUT
)
)
13
and A
14
13
and V
)
REF
14
0
)
)
14
.
)
and A
)
1
S
RFL
(1 -
.
to
1