X9259 Xicor, X9259 Datasheet - Page 4

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X9259

Manufacturer Part Number
X9259
Description
Quad Digitally-Controlled (XDCP) Potentiometers
Manufacturer
Xicor
Datasheet

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X9259
PIN DESCRIPTIONS
Bus Interface Pins
S
The SDA is a bidirectional serial data input/output pin
for a 2-Wire slave device and is used to transfer data
into and out of the device. It receives device address,
opcode, wiper register address and data sent from an
2-Wire master at the rising edge of the serial clock
SCL, and it shifts out data after each falling edge of the
serial clock SCL.
It is an open drain output and may be wire-ORed with
any number of open drain or open collector outputs. An
open drain output requires the use of a pull-up resistor.
For selecting typical values, refer to the guidelines for
calculating typical values on the bus pull-up resistors
graph.
S
This input is used by 2-Wire master to supply 2-Wire
serial clock to the X9259.
D
The Address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with
the X9259. A maximum of 16 devices may occupy the
2-Wire serial bus. Device pins A3-A0 must be tie to a
logic level which specify the external address of the
device, see figures 3, 4, and 5.
REV 1.2.3 4/30/02
ERIAL
ERIAL
EVICE
D
C
A
ATA
LOCK
DDRESS
I
NPUT
(SCL)
(A3–A0)
/O
UTPUT
(SDA)
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Potentiometer Pins
R
The R
connections on a mechanical potentiometer. Since
there are 4 potentiometers, there are 4 sets of R
R
and so on.
R
The wiper pin are equivalent to the wiper terminal of a
mechanical
potentiometers, there are 4 sets of R
is the terminal of POT 0 and so on.
Bias Supply Pins
S
The V
is the system ground.
Other Pins
N
H
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
YSTEM
H
L
W
O
ARDWARE
, R
C
such that R
ONNECT
L
CC
H
S
UPPLY
and R
pin is the system supply voltage. The V
W
RITE
potentiometer.
V
H0
L
OLTAGE
P
ROTECT
pins are equivalent to the terminal
Characteristics subject to change without notice.
and R
(V
I
L0
CC
NPUT
are the terminals of POT 0
)
AND
(WP)
Since
S
UPPLY
W
there
such that R
G
ROUND
are
(V
SS
H
4 of 25
SS
and
pin
W0
)
4

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