SAA7151 Philips Semiconductors, SAA7151 Datasheet - Page 4

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SAA7151

Manufacturer Part Number
SAA7151
Description
Digital multistandard colour decoder with SCART interface DMSD2-SCART
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
PINNING
April 1993
SP
AP
RESN
CREF
V
CUV0
CUV1
CUV2
CUV3
CUV4
CUV5
CUV6
CUV7
CVBS0
CVBS1
CVBS2
CVBS3
V
V
CVBS4
CVBS5
CVBS6
CVBS7
GPSW1
GPSW2
HCL
LL27
V
HSY
VS
HS
RTCO
XTAL
XTALI
V
LFCO
V
V
SYMBOL
DD1
DD2
SS1
DD3
SSA
DDA
SS2
Digital multistandard colour decoder with
SCART interface (DMSD2-SCART)
PIN DESCRIPTION
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
1
2
3
4
5
6
7
8
9
connected to ground (shift pin for testing)
connected to ground (action pin for testing)
reset, active-LOW
clock reference, sync from external to ensure in-phase signals on the Y-, CUV- and YUV-bus
ground 1 (0 V)
status bit output FSST0 or port 1 output for general purpose (programmable by subaddress 0C)
status bit output FSST1 or port 2 output for general purpose (programmable by subaddress 0C)
black level clamp pulse output (begin and stop programmable), e.g. for TDA8708A (ADC)
line-locked system clock input signal (27 MHz)
hor. sync pulse reference output (begin and stop programmable), e.g. for gain adj.TDA8708A
(ADC)
vertical sync output signal (Fig.11)
horizontal sync output signal (Fig.16; start point programmable)
real time control output; serial increments of HPLL and FSCPLL and status PAL or SECAM
sequence (Fig.10)
24.576 MHz clock output (open-circuit for use with external oscillator)
24.576 MHz connection for crystal or external oscillator (TTL compatible squarewave)
analog ground
line frequency control output signal, multiple of horizontal frequency (nominal 6.75 MHz)
ground 2 (0 V)
5 V supply input 1
5 V supply input 2
5 V supply input 3
5 V supply input for analog part
chrominance input data bits CUV7 to CUV0 (digitized chrominance signals in two’s complement
format from a S-Video source (S-VHS, Hi8) or time-multiplexed colour-difference signals from a
YUV(RGB) source or both in combination)
CVBS lower input data bits CVBS3 to CVBS0
(CVBS with luminance, chrominance and all sync information in two’s complement format)
CVBS upper input data bits CVBS7 to CVBS4
(CVBS with luminance, chrominance and all sync information in two’s complement format)
4
Product specification
SAA7151B

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