MPC857DSL Motorola, MPC857DSL Datasheet - Page 27
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MPC857DSL
Manufacturer Part Number
MPC857DSL
Description
(MPC857 / MPC862) Hardware Specifications
Manufacturer
Motorola
Datasheet
1.MPC857DSL.pdf
(88 pages)
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Figure 10 provides the timing for the input data controlled by the UPM for data beats where DLT3 = 1 in
the UPM RAM words. (This is only the case where data is latched on the falling edge of CLKOUT.)
Figure 11 through Figure 14 provide the timing for the external bus read controlled by various GPCM
factors.
MOTOROLA
CLKOUT
CLKOUT
WE[0:3]
D[0:31],
D[0:31],
DP[0:3]
DP[0:3]
A[0:31]
CSx
OE
TS
TA
Figure 11. External Bus Read Timing (GPCM Controlled—ACS = 00)
Figure 10. Input Data Timing when Controlled by UPM in the
MPC862/857T/857DSL Hardware Specifications
Freescale Semiconductor, Inc.
For More Information On This Product,
B11
B22
B8
B28
B20
Memory Controller and DLT3 = 1
Go to: www.freescale.com
B21
B12
B25
B18
B23
B26
B19
Bus Signal Timing
27