MPC857DSL Motorola, MPC857DSL Datasheet - Page 61

• Manufacturer Part Number: MPC857DSL
• Description: (MPC857 / MPC862) Hardware Specifications
• Manufacturer: Motorola

1
2
MOTOROLA
Num
The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 2/1.
SDACK is asserted whenever the SDMA writes the incoming frame DA into memory.
135
136
137
138
139
RENA(CD1)
CLSN(CTS1)
RSTRT active delay (from TCLK1 falling edge)
RSTRT inactive delay (from TCLK1 falling edge)
REJECT width low
CLKO1 low to SDACK asserted
CLKO1 low to SDACK negated
RCLK1
(Input)
(Input)
RxD1
(Input)
MPC862/857T/857DSL Hardware Specifications
Freescale Semiconductor, Inc.
Figure 60. Ethernet Collision Timing Diagram
Figure 61. Ethernet Receive Timing Diagram
For More Information On This Product,
Table 22. Ethernet Timing (continued)
Characteristic
2
2
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121
124
120
125
121
126
CPM Electrical Characteristics
All Frequencies
Min
123
10
10
—
—
1
Last Bit
127
Max
50
50
—
20
20
Unit
CLK
ns
ns
ns
ns
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