MC68HC11E Motorola, MC68HC11E Datasheet - Page 215

• Manufacturer Part Number: MC68HC11E
• Description: Microcontrollers
• Manufacturer: Motorola

Automatic Selection of Baud Rate
AN1060 — Rev. 1.0
MOTOROLA
NOTE:
The bootloader program in the MC68HC711E9 accommodates either of
two baud rates.
Software can change some aspects of the memory map after reset.
Figure 2
default baud rate (7812 baud at a 2-MHz E-clock rate) and the alternate
baud rate (1200 baud at a 2-MHz E-clock rate). The host computer
sends an initial $FF character, which is used by the bootloader to
determine the baud rate that will be used for the downloading operation.
The top half of
samples at [1] detect the falling edge of the start bit and then verify the
start bit by taking a sample at the center of the start bit time. Samples
are then taken at the middle of each bit time [2] to reconstruct the value
of the received character (all 1s in this case). A sample is then taken at
the middle of the stop bit time as a framing check (a 1 is expected) [3].
Unless another character immediately follows this $FF character, the
receive data line will idle in the high state as shown at [4].
The bottom half of
receive the $FF character that is sent from the host at 1200 baud.
Because the receiver is set to 7812 baud, the receive data samples are
taken at the same times as in the upper half of
1200 baud [5] is 6.5 times as long as the start bit at 7812 baud [6].
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Freescale Semiconductor, Inc.
For More Information On This Product,
The higher of these baud rates (7812 baud at a 2-MHz E-clock
rate) is used in systems that operate from a binary frequency
crystal such as 2
baud rate is 8192 baud, which was used extensively in automotive
applications.
The second baud rate available to the M68HC11 bootloader is
1200 baud at a 2-MHz E-clock rate. Some of the newest versions
of the M68HC11, including the MC68HC11F1 and
MC68HC117K4, accommodate other baud rates using the same
differentiation technique explained here. Refer to the reference
numbers in square brackets in
explanation.
shows how the bootloader program differentiates between the
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Figure 2
Figure 2
23
shows normal reception of $FF. Receive data
Hz (8.389 MHz). At this crystal frequency, the
shows how the receiver will incorrectly
Figure 2
during the following
Figure
2. The start bit at
Application Note
215