PALC22V10 Cypress Semiconductor, PALC22V10 Datasheet

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PALC22V10

Manufacturer Part Number
PALC22V10
Description
Reprogrammable CMOS PAL Device
Manufacturer
Cypress Semiconductor
Datasheet

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Features
Cypress Semiconductor Corporation
• Advanced second-generation PAL architecture
• Low power
• CMOS EPROM technology for reprogrammability
• Variable product terms
• User-programmable macrocell
Logic Block Diagram (PDIP/CDIP)
PAL is a registered trademark of Advanced Micro Devices.
Pin Configuration
V SS
12
13
— 55 mA max. “L”
— 90 mA max. standard
— 120 mA max. military
— 2 x (8 through 16) product terms
— Output polarity control
— Individually selectable for registered or
I
combinatorial operation
Reset
Macrocell
11
I/O 9
14
I
8
Macrocell
10
I/O 8
10
15
I
Macrocell
I/O 7
12
16
9
I
Macrocell
I/O 6
14
17
8
I
3901 North First Street
Cypress representative for complete specifications.
For new designs, please refer to the PALCE22V10.
NC
I
I
I
I
I
I
Macrocell
5
6
7
8
9
10
11
I/O 5
7
16
I
18
PROGRAMMABLE
12131415161718
4 3 2
LCC/PLCC
AND ARRAY
Top View
(132 X 44)
1
Macrocell
Functional Description
The Cypress PALC22V10 is a CMOS second-generation pro-
grammable logic array device. It is implemented with the
familiar sum-of-products (AND-OR) logic structure and a
new concept, the “programmable macrocell.”
282726
• 20, 25, 35 ns commercial and industrial
• 25, 30, 40 ns military
• Up to 22 input terms and 10 outputs
• High reliability
• Windowed DIP, windowed LCC, DIP, LCC, and PLCC
I/O 4
16
6
19
I
available
— Proven EPROM technology
— 100% programming and functional testing
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
Macrocell
V10–2
2
3
4
5
6
7
San Jose
14
Reprogrammable CMOS
I/O 3
5
I
20
Macrocell
June 1986 – Revised September 1995
12
I/O 2
4
I
21
CA 95134
Macrocell
10
I/O 1
3
22
I
PAL® Device
PALC22V10
Macrocell
I/O 0
2
23
I
8
fax id: 6005
408-943-2600
Preset
CP/I
V10–1
V CC
1
24

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PALC22V10 Summary of contents

Page 1

... Windowed DIP, windowed LCC, DIP, LCC, and PLCC available Functional Description The Cypress PALC22V10 is a CMOS second-generation pro- grammable logic array device implemented with the familiar sum-of-products (AND-OR) logic structure and a new concept, the “programmable macrocell.” ...

Page 2

... Functional Description (continued) The PALC22V10 is available in 24-pin 300-mil molded DIPs, 300-mil windowed cerDIPs, 28-lead square ceramic leadless chip carriers, 28-lead square plastic leaded chip carriers, and provides inputs and 10 outputs. When the windowed cerDIP is exposed to UV light, the 22V10 is erased and can then be reprogrammed ...

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