CS4228A-KS Cirrus Logic, CS4228A-KS Datasheet - Page 21

• Manufacturer Part Number: CS4228A-KS
• Description: 24-Bit/ 96 kHz Surround Sound Codec
• Manufacturer: Cirrus Logic

5. REGISTER DESCRIPTIONS
All registers are read/write except for Chip Status, which is read only. See the following bit definition tables for bit
assignment information. The default state of each bit after a power-up sequence or reset is listed in the tables un-
derneath each bit’s label. Default values are also marked in the text with an asterisk.
5.1 Memory Address Pointer (MAP)
Not a register
INCR
MAP4:0
5.2 CODEC Clock Mode
Address 0x01
HRM
CI1:0
DS511PP1
INCR
HRM
7
1
7
0
memory address pointer auto increment control
0 -
*1 -
Memory address pointer (MAP). Sets the register address that will be read or written by the con-
trol port.
Sets the sample rate mode for the ADCs and DACs
*0 -
1 -
Specifies the ratio of MCLK to the sample rate of the ADCs and DACs (Fs)
6
0
6
0
RESERVED
CI1:0
*1
MAP is not incremented automatically.
internal MAP is automatically incremented after each read or write.
Base Rate Mode (BRM) supports sample rates up to 50 kHz
High Rate Mode (HRM) supports sample rates up to 100 kHz. Typically used for
96 kHz sample rate.
0
2
3
RESERVED
BRM (Fs)
5
0
5
0
128
256
384
512
MAP4
HRM (Fs)
4
0
4
0
128
192
256
64
MAP3
CI1
3
0
3
0
MAP2
CI0
2
0
2
1
MAP1
1
0
1
0
RESERVED
CS4228A
MAP0
0
1
0
0
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