LTC4088-1_12 LINER [Linear Technology], LTC4088-1_12 Datasheet - Page 14
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LTC4088-1_12
Manufacturer Part Number
LTC4088-1_12
Description
High Efficiency Battery Charger/USB Power Manager
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC4088-1_12.pdf
(24 pages)
LTC4088-1/LTC4088-2
operaTion
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of ON
for charging, OFF for not charging or it is switched at high
frequency (35kHz) to indicate the two possible faults. While
switching at 35kHz, its duty cycle is modulated at a slow
rate that can be recognized by a human.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When charg-
ing is complete, as determined by the criteria set by the
C/X pin, the CHRG pin is released (Hi-Z). The CHRG pin
does not respond to the C/X threshold if the LTC4088-1/
LTC4088-2 is in V
of charge indications due to insufficient power available to
the battery charger. If a fault occurs while charging, the
pin is switched at 35kHz. While switching, its duty cycle
is modulated between a high and low value at a very low
frequency. The low and high duty cycles are disparate
enough to make an LED appear to be on or off thus giv-
ing the appearance of “blinking”. Each of the two faults
has its own unique “blink” rate for human recognition as
well as two unique duty cycles for machine recognition.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
Notice that an NTC fault is represented by a 35kHz pulse
train whose duty cycle toggles between 6.25% and 93.75%
at a 1.5Hz rate. A human will easily recognize the 1.5Hz
rate as a “slow” blinking which indicates the out of range
battery temperature while a microprocessor will be able
to decode either the 6.25% or 93.75% duty cycles as an
NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
14
Bad Battery
I
NTC Fault
Charging
BAT
STATUS
< C/X
FREQUENCY
35kHz
35kHz
0Hz
0Hz
BUS
current limit. This prevents false end
(BLINK) FREQUENCY
MODULATION
1.5Hz at 50%
6.1Hz at 50%
0Hz (Low Z)
0Hz (Hi-Z)
6.25% or 93.75%
12.5% or 87.5%
CYCLES
100%
DUTY
0%
pin gives the battery fault indication. For this fault, a hu-
man would easily recognize the frantic 6.1Hz “fast” blink of
the LED while a microprocessor would be able to decode
either the 12.5% or 87.5% duty cycles as a bad cell fault.
Because the LTC4088-1/LTC4088-2 is a 3-terminal Power-
Path product, system load is always prioritized over battery
charging. Due to excessive system load, there may not
be sufficient power to charge the battery beyond the bad
cell threshold voltage within the bad cell timeout period.
In this case the battery charger will falsely indicate a bad
cell. System software may then reduce the load and reset
the battery charger to try again.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
C/X Determination
The current exiting the C/X pin represents 1/1031th of
the battery charge current. With a resistor from C/X to
ground that is X/10 times the resistor at the PROG pin,
the CHRG pin releases when the battery current drops to
C/X. For example, if C/10 detection is desired, R
be made equal to R
R
state is given by:
With this design, C/10 detection can be achieved with only
one resistor rather than a resistor for both the C/X pin and
the PROG pin. Since both of these pins have 1/1031 of
the battery charge current in them, their voltages will be
equal when they have the same resistor value. Therefore,
rather than using two resistors, the C/X pin and the PROG
pin can be connected together and the resistors can be
paralleled to a single resistor of 1/2 of the program resistor.
PROG
I
BAT
. The current threshold at which CHRG will change
=
R
V
C/X
C/X
• 1031
PROG
. For C/20, R
C/X
would be twice
C/X
should
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