LTC4110EUHF LINER [Linear Technology], LTC4110EUHF Datasheet - Page 36

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LTC4110EUHF

Manufacturer Part Number
LTC4110EUHF
Description
Battery Backup System Manager
Manufacturer
LINER [Linear Technology]
Datasheet

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LTC4110
APPLICATIONS INFORMATION
to monitor the primary current in both sides with a single
R
connected prior to R
is always 180 degrees out of phase with the primary, the
following current waveform in Figure 14 is the result.
In terms of current sensing, the primary current portion
of the above waveform is monitored for peak current (DC
+ AC) at any time in any mode. It does not monitor the
batteries’ DC current. The LTC4110 uses leading edge
blanking to mask out noise to make the application of this
part simple to use. The secondary portion of the above
waveform is monitored for negative peak current to sense
for short circuit.
The value of ripple current, ΔI, is a direct function of the
transformer inductance. See transformer section for more
information about transformer ripple current.
You must calculate the I
and calibration current mode. The equation for calculating
the I
I
The value of E is the fl yback effi ciency. Use 80% (0.8) as
the value since the fl yback uses synchronous rectifi ca-
tion. E is not used for the calibration equation because
36
PRI
SNS(FET)
I
I
PRI(CHG)
PRI(CAL)
for the Calibration mode is as follows:
PRI
for charge mode is as follows:
0
resistor, both transformer windings must be
Figure 14. R
=
= I
2 • f • L
2 • f • (N
I
CAL
CHG
E
SNS(FET)
PRI
I
2
PRI
SNS(FET)
N • V
V
V
V
PRI
• L
BAT
DCIN
V
V
BAT
• V
BAT
BAT
(
PRI
DCIN
for both charge current mode
I
PRI
. Since the secondary phase
N
• V
BAT
Current Waveform
+ N +
) • V
• V
DCIN
PRIMARY CURRENT
SECONDARY CURRENT
+ 1 +
+ N • V
DCIN
DCIN
DCIN
+
V
4110 F14
BAT
N
)
(1)
(2)
in calibration mode input current is regulated, not the
output current.
The LTC4110’s I
voltage range for V
30mV and 150mV peak in both charge and calibration
modes when operating at full current. The negative portion
of the waveform is also monitored but has a dynamic trip
level that tracks the actual primary current. The trip level
has a gain factor of –3. If the secondary current trips the
negative level, the fl yback goes into current limit.
These limits have the following implications:
• The ratio of peak current between I
• The transformer turns ratio will approximately reduce
• You cannot use a transformer with a turns ratio
• Because effi ciency is always less than 100%, you
As a design starting point, use the lowest value between
I
for good effi ciency and solve for R
With an initial value of R
V
I
below the upper limits. If it is too high, you may have to
drop the value of R
upper or lower limits and/or ratio limits, you may have to
back off on one of the I
to compensate.
Once within all the limits, optimize R
effi ciency by using very low value of R
a popular R
values of R
higher switching noise sensitivity issues.
PRI(CHG)
PRI(CAL)
SNS(FET)
cannot be greater than 5-to-1 as seen by R
the maximum available DC current ratio between I
to I
being ripple current and effi ciency.
greater than 3.
never have to worry about peak secondary current
causing a false short circuit trip within the turns ratio
limit of 3 or less.
R
SNS FET
CAL
(
and I
and see if the calculated value of V
by a factor of 1/N. The additional variables
using the highest value between I
SNS(FET)
)
SNS(FET)
PRI(CAL)
=
V
SENSE
SNS(FET).
SNS FET
I
SNS(FET)
PRI
is increased waveform jitter due to
value. The tradeoff of using lower
(
CHG
for I
pin has a limited usable positive
)
PRI
and I
If you cannot meet the V
. The range must be between
SNS(FET)
, let V
CAL
SNS(FET)
DC current parameters
SNS(FET)
SNS(FET)
PRI(CHG)
identifi ed, solve for
SNS(FET)
be set to 50mV
.
for maximum
SNS(FET)
SNS(FET)
and I
PRI(CHG)
and/or fi nd
SNS(FET)
PRI(CAL)
.
falls
4110fa
CHG
or

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