LTC6102CDD LINER [Linear Technology], LTC6102CDD Datasheet - Page 12

• Manufacturer Part Number: LTC6102CDD
• Description: Precision Zero Drift Current Sense Amplifi er
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC6102/LTC6102HV
Clock Feedthrough, Input Bias Current
The LTC6102 uses auto-zeroing circuitry to achieve an
almost zero DC offset over temperature, sense voltage,
and power supply voltage. The frequency of the clock
used for auto-zeroing is typically 10kHz. The term clock
feedthrough is broadly used to indicate visibility of this
clock frequency in the op amp output spectrum. There are
typically two types of clock feedthrough in auto zeroed
amps like the LTC6102.
The fi rst form of clock feedthrough is caused by the
settling of the internal sampling capacitor and is input
referred; that is, it is multiplied by the internal loop gain
of the amp. This form of clock feedthrough is indepen-
dent of the magnitude of the input source resistance or
the magnitude of the gain setting resistors. The LTC6102
has a residue clock feedthrough of less then 1μV
referred at 10kHz.
The second form of clock feedthrough is caused by the
small amount of charge injection occurring during the
sampling and holding of the amp’s input offset voltage.
The current spikes are multiplied by the impedance seen
at the input terminals of the amp, appearing at the output
multiplied by the internal loop gain of the internal op amp.
To reduce this form of clock feedthrough, use smaller
valued gain setting resistors and minimize the source
resistance at the input.
Input bias current is defi ned as the DC current into the
input pins of the op amp. The same current spikes that
cause the second form of clock feedthrough described
above, when averaged, dominate the DC input bias current
of the op amp below 70°C.
As temperature increases, the leakage of the ESD protec-
tion diodes on the inputs increases the input bias currents
of both inputs in the positive direction, while the current
caused by the charge injection stays relatively constant. At
temperatures above 70°C, the leakage current dominates
and both the negative and positive pins’ input bias currents
are in the positive direction (into the pins).
Output Current Limitations Due to Power Dissipation
The LTC6102 can deliver more than 1mA continuous cur-
rent to the output pin. This current fl ows through R
12
RMS
IN
input
and
enters the current sense amp via the –INF pin. The power
dissipated in the LTC6102 due to the output current is:
There is also power dissipated due to the quiescent sup-
ply current:
The total power dissipated is the output current dissipation
plus the quiescent dissipation:
At maximum supply and maximum output current, the
total power dissipation can exceed 100mW. This will
cause signifi cant heating of the LTC6102 die. In order to
prevent damage to the LTC6102, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θ
package section on page 2 to fi nd the maximum expected
die temperature. This must not be allowed to exceed 150°C
or performance may be degraded.
As an example, if an LTC6102 in the MSOP package is to
be biased at 55V ±5V supply with 1mA output current at
80°C:
If this same circuit must run at 125°C, the max die temp
will increase to 155°C. (Note that supply current, and
therefore P
Performance Characteristics section.) In this condition,
the maximum output current should be reduced to avoid
device damage. Note that the DD package has a smaller θ
than the MSOP package, which will substantially reduce
the die temperature at similar power levels.
P
Since V
P
P
P
P
T
T
T
P
will be 110°C
TOTAL
RISE
MAX
MAX
TOTAL(MAX)
OUT
Q
Q(MAX)
OUT(MAX)
= I
= (V
= T
must be < 125°C
S
= θ
= P
–INF
• V
Q
= I
AMBIENT
JA
, is proportional to temperature. Refer to Typical
–INF
+
OUT
= I
DD(MAX)
• P
≈ V
≈ 99mW and the max die temp
OUT
– V
TOTAL(MAX)
+ P
+
, P
+ T
OUT
• V
Q
OUT
• V
RISE
+
) • I
(MAX)
+
≈ (V
(MAX)
OUT
+
= 60mW
– V
= 39mW
OUT
JA
value listed in the
) • I
OUT
6102fb
JA