MMA16XXKW FREESCALE [Freescale Semiconductor, Inc], MMA16XXKW Datasheet

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MMA16XXKW

Manufacturer Part Number
MMA16XXKW
Description
DSI Inertial Sensor
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Freescale Semiconductor
Data Sheet: Technical Data
© 2010-2012 Freescale Semiconductor, Inc. All rights reserved.
DSI Inertial Sensor
The MMA16xxKW family, a SafeAssure solution, includes the DSI2.5 compatible
overdamped Z-axis satellite accelerometers.
Features
• ±50g to ±312.5g Nominal Full-Scale Range
• Selectable 180 Hz, 2-pole, 400 Hz, 4-pole, or 800 Hz, 4-pole LPF
• DSI2.5 Compatible with full support of Mandatory Commands
• Internal High Side Bus Switch for DSI2.5 Daisy Chain Applications
• 16 s internal sample rate, with interpolation to 1 ms
• -40°C to 125°C Operating Temperature Range
• Pb-Free 16-Pin QFN, 6 by 6 Package
• Qualified AECQ100, Revision G, Grade 1 (-40 C to +125 C)
Typical Applications
• Airbag Front and Side Crash Detection
For user register array programming, please consult your Freescale representative.
(http://www.aecouncil.com/)
MMA1605KWR2
MMA1606KWR2
MMA1612KWR2
MMA1618KWR2
MMA1631KWR2
MMA1605KW
MMA1606KW
MMA1612KW
MMA1618KW
MMA1631KW
Device
Axis
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
ORDERING INFORMATION
Range
62.5g
62.5g
125g
187g
312g
125g
187g
312g
50g
50g
Package
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Shipping
Tubes
Tubes
Tubes
Tubes
Tubes
BUSRTN
TEST2
TEST3
TEST1
Document Number: MMA16xxKW
MMA16xxKW
PIN CONNECTIONS
1
2
3
4
Bottom View
CASE 2086-01
16 15 14 13
5
16-PIN QFN
17
Top View
6
7
Rev. 4, 03/2012
8
12
10
11
9
V
C
TEST4
C
SSA
REGA
REG

Related parts for MMA16XXKW

MMA16XXKW Summary of contents

Page 1

... Freescale Semiconductor Data Sheet: Technical Data DSI Inertial Sensor The MMA16xxKW family, a SafeAssure solution, includes the DSI2.5 compatible overdamped Z-axis satellite accelerometers. Features • ±50g to ±312.5g Nominal Full-Scale Range • Selectable 180 Hz, 2-pole, 400 Hz, 4-pole, or 800 Hz, 4-pole LPF • DSI2.5 Compatible with full support of Mandatory Commands • ...

Page 2

... Application Diagram C4 Ref Des Type C1 Ceramic C2 Ceramic C3 Ceramic, Tantalum C4 Ceramic C5 Ceramic Device Orientation xxxxxxx xxxxxxx MMA16xxKW 2 TEST2 BUSIN V CC TEST1 TEST3 MMA16xx TEST4 BUSRTN V TEST5 SS TEST6 TEST7 C REG BUSOUT C REGA HCAP C5 V SSA PCM V SS Figure 1. Application Diagram ...

Page 3

... OTP FUSE ARRAY CONTROL STATUS IN OUT DSP IIR SINC Filter Low-Pass Filter – – -------------------------------- - – D – Figure 3. Block Diagram V REG V REGA V REF LOW-VOLTAGE RESET TEST Compensation PCM Encoder MMA16xxKW HCAP C REG C REGA V SSA TEST3 TEST4 TEST5 TEST6 PCM 3 ...

Page 4

... This pin is the power supply return node for the digital circuitry PAD Die Attach Pad This pin is the die attach flag, and should be connected to VSS in the application. Reference Corner Corner Pads The corner pads are internally connected to V Pads MMA16xxKW TEST2 TEST3 ...

Page 5

... DROP V 2000 V ESD V 500 V ESD V 200 V ESD T -40 to +125 °C stg T -40 to +150 °C J 2.5 C/W JC Min Typ Max Units 6.3 30 -0.3 30 14.0 30 -40 +105 -40 +125 MMA16xxKW (3) (3) (3) (3) (3) (5) (5) (5) (5) (5) (5) (3) (3) (11) V (1,12) V (1,12) V (3) mA (3) °C (1) °C (3) 5 ...

Page 6

... BUSIN to BUSOUT Leakage Current (BUS SWITCH open 24.0V BUSIN BUSOUT 0V 16V BUSIN BUSOUT BUSIN Logic Thresholds 50 Signal Threshold 51 Frame Threshold BUSIN Logic Hysteresis 52 Signal 53 Frame MMA16xxKW K/min, unless otherwise specified. Symbol * INRUSH V REG V REGA 5) V PORHCAP_f V PORHCAP_r ) V HYST_HCAP V ...

Page 7

... RMS NL OUT Min Typ Max Units 10.24 LSB/g 8.192 LSB/g 4.096 LSB/g 2.731 LSB/g 1.638 LSB 460 512 564 LSB 1 1023 LSB 0 LSB -5 — — — +4 LSB +1.2 LSB - MMA16xxKW (1,14) (1,14) (1,14) (1,14) (1,14) (1) (1) (1) (3) (3) (3) (3) (3) (3) (3) 7 ...

Page 8

... Deflection, 10-Bit, Self-Test - Offset, 30 sample ave ±50g Range 84 ±62.5g Range 85 ±125g Range 86 ±187g Range 87 ±312g Range 88 Self-Test deflection range Self-Test deflection range MMA16xxKW K/min, unless otherwise specified. Symbol g g-cell_Clip60ZP g g-cell_Clip60ZN g g-cell_Clip240ZP g g-cell_Clip240ZN g ADC_Clip60ZP g ADC_Clip60ZN g ADC_Clip60ZP g ...

Page 9

... OSC OSC 500 s 64 256 s 2.00 5.00 ms 2.00 5.00 ms 1.00 2.50 ms 1.00 2.50 ms 0.50 1.75 ms 0.50 1. OSC MMA16xxKW (7) (7) (7) (7) (7) (3) (3) (7) (7) (7) (7) (3) (7) (7) (3) (7) (7) (7) (7) (7) (7) (7) (7) (7) (3) (7) (7) (7) (7) (7) (7) (7) (7) 9 ...

Page 10

... Minimum voltage tested 100% at final test. Maximum voltage tested 100% to 24V at final test. 13.N/A. 14.Sensitivity, and overload capability specifications will be reduced when 800 Hz filter is selected. 15.Filter cutoff frequencies are directly dependent upon the internal oscillator frequency. 16.Target values. Actual values to be determined during device characterization. MMA16xxKW K/min, unless otherwise specified Symbol ...

Page 11

... V V HYST_HCAP HCAP POR V REG V PORVREG_r V PORVREG_f V HYST_VREG POR V REGA V PORVREGA_r V PORVREGA_f V HYST_VREGA POR Sensors Freescale Semiconductor, Inc. UV Figure 5. V Under-Voltage Detection HCAP t Figure 6. V Under-Voltage Detection REG t VREGA_POR Figure 7. V Under-Voltage Detection REGA UV: UNDER-VOLTAGE CONDITION EXISTS UV t HCAP_POR VREG_POR MMA16xxKW 11 ...

Page 12

... V THF V THS BUSIN’ t IFS_master t IFS_slave EOF slave 9mA 1mA I RESPONSE DSP_OUT MMA16xxKW 12 t START_master LOGIC ‘1’ t START_slave t ITR t RSP_R t LAT_DSI t LAT_INTERP Figure 8. DSI Bus Inter-frame Timing LOGIC ‘0’ t ITR t RSP_F Sensors Freescale Semiconductor, Inc. ...

Page 13

... ADDR[2] ADDR[1] ADDR[0] UD01[3] UD01[2] UD01[1] UD01[0] UD02[3] UD02[2] UD02[1] UD02[0] UD03[3] UD03[2] UD03[1] UD03[0] UD04[3] UD04[2] UD04[1] UD04[0] UD05[3] UD05[2] UD05[1] UD05[0] UD06[3] UD06[2] UD06[1] UD06[0] UD07[3] UD07[2] UD07[1] UD07[0] UD08[3] UD08[2] UD08[1] UD08[0] Section 3.2.1 for details MMA16xxKW Type F U/F 13 ...

Page 14

... MMA16xxKW 14 Bit LPF[1] LPF[ LPF[0] Low-Pass Filter Selected 0 0 400 Hz, 4-Pole 0 1 Not Enabled 1 0 180 Hz, 2-Pole 1 1 800 Hz, 4-Pole RNG[1] ...

Page 15

... DEVCFG1 Values AT_OTP[1] AT_OTP[ Bnk0 $09 0 CRC_U[2] CRC_U[1] CRC_U[ for more information regarding the Request Bnk1 $06 UD00[1] UD00[0] AT_OTP[1] AT_OTP[ DSI Transmitted Values AT[1] AT[ MMA16xxKW ...

Page 16

... UD03 Bnk2 $0A Bnk2 $0B $0B UD04 $0C UD05 Bnk2 $0C $0D UD06 Bnk2 $0D $0E UD07 Bnk2 $0E $0F UD08 Bnk2 $0F Factory Default MMA16xxKW 16 Section 3.2.2 for details regarding the CRC for the user programma- Bit WA[3:0] LOCK_U UNUSED PCM RESERVED Section 3.5.3.6 Bit ...

Page 17

... Lock Bit Active? Enabled YES YES Included in Factory CRC? Yes Yes Yes No No CRC Verification Lock Bit Active? Enabled YES YES Included in User CRC? Yes Yes Yes Yes Yes Yes Yes Yes No No Section 4.3. The CRC verification is completed MMA16xxKW 17 ...

Page 18

... V Voltage Monitor HCAP The device includes a circuit to monitor the voltage on the HCAP pin. If the voltage falls below the specified threshold in Section 2, the device will be reset within the reset delay time (t MMA16xxKW 18 ). External filter capacitors are required, as shown in REG V BUF VOLTAGE REGULATOR ...

Page 19

... CAPTEST_RATE t CAPTEST_RATE t CAPTEST_TIME Capacitor Present Time Figure 10. V Capacitor Monitor REG t CAPTEST_RATE t CAPTEST_TIME Capacitor Present Time Figure 11. V Capacitor Monitor REGA Section 2.8. and either of the internal regulator REGA , VREG_POR or C capacitor REG REGA Capacitor Open Capacitor Open MMA16xxKW 19 ...

Page 20

... DSP block is shown in _OUT A Sinc Filter – – – -------------------------------- - 11 12 ---------------------------------------------------------------------------- - – D – – MMA16xxKW ------------------------------------------------------ FIRST INTEGRATOR Figure 12. Converter Block Diagram Figure 13. Low-Pass Filter – ...

Page 21

... – 16 – Figure 14. Sinc Filter Response, t Signal Margin Typical Block (Bits) (Bits) Latency Section 3.5.2 112/f osc 4 Section 3.5.3.1 Reference Section 4 9 Section 3.5.3.2 3.5.3 24/f Section 3.5.3.3 osc 4/f Section 3.5.3.5 osc 64/f Section 3.5.3.5 osc MMA16xxKW Reference 21 ...

Page 22

... Hz LPF 800 Hz LPF Note: Low-Pass Filter Figures do not include g-cell frequency response. MMA16xxKW – – -------------------------------------------------------------------------------------------- – – Section 3.1.2.1, Table 8. Response parameters for the low-pass filter are specified in ...

Page 23

... Figure 15. Low-Pass Filter Characteristics: f Sensors Freescale Semiconductor, Inc. = 180 Hz, 2-Pole MMA16xxKW 23 ...

Page 24

... Figure 16. Low-Pass Filter Characteristics: f MMA16xxKW 24 = 400 Hz, 4-Pole Freescale Semiconductor, Inc. Sensors ...

Page 25

... Figure 17. Low-Pass Filter Characteristics: f Sensors Freescale Semiconductor, Inc. = 800 Hz, 4-Pole MMA16xxKW 25 ...

Page 26

... PCM pin. The PCM output is intended for test use only. A block diagram of the PCM output is shown in Figure 19. Output Scaling 9 D_x[9:1] Sample updated every 16 S Figure 19. PCM Output Function Block Diagram MMA16xxKW 26 Signal Figure 18. Output Scaling Diagram A CARRY 9 Bit ADDER D 9 ...

Page 27

... No Response DSI Read Acceleration Data Short response = zero. 0 DSI Read Acceleration Data Long response = invalid data. 0 Normal DSI Response 0 No Response 0 No Response DSI Read Acceleration Data Short response = zero. 0 DSI Read Acceleration Data Long response = invalid data. 0 Normal MMA16xxKW 27 ...

Page 28

... DSP. The converter can saturate at levels above those specified in ably under all cases of overrange, although the signal may include residual high frequency components for some time after re- turning to the normal range of operation due to non-linear effects of the sensor. MMA16xxKW 28 g-cell Rolloff ...

Page 29

... Standard/Enhanced L/S Not Implemented Standard/Enhanced L WA[3] Standard/Enhanced L R/W Standard/Enhanced L 0 Standard/Enhanced L/S Standard/Enhanced L/S Not Implemented Not Implemented Section ). As long as the minimum inter-frame sep- IFS Data Bnk[1] Bnk[0] PA[3] PA[2] PA[1] Not Implemented Not Implemented Not Implemented Not Implemented WA[2] WA[1] WA[0] RD[3] RD[2] RD[1] FA[2] FA[1] FA[0] FD[3] FD[2] FD[ RA[3] RA[2] RA[1] Not Implemented Not Implemented MMA16xxKW 4.2.1. D0 PA[0] RD[0] FD[0] RA[0] 29 ...

Page 30

... A[3:0]. Once the device address is assigned, the new address (A[3:0]) is not protected by the User Programmable OTP Array CRC Verification. The User Programmable OTP array CRC is calculated and verified using the OTP programmed values of A[3:0] = ‘0000’. Once initialized, the device will no longer recognize or respond to Initialization commands. Table 14. Initialization Command Response D[15] D[14] D[13] D[12] D[11] PA[3] PA[2] PA[1] PA[0] 0 MMA16xxKW 30 Address D[2] D[1] D[0] A[3] A[2] A[1] PA[2] PA[1] PA[0] A[3] A[2] A[1] ...

Page 31

... Bus test passed ENABLE I Delay t MEASURE V CLOSE BUS SWITCH Sensors Freescale Semiconductor, Inc. Definition N INITIALIZATION COMMAND CURRENT RESP BUSOUT_DISCHARGE BUSOUT N V < SET BF FLAG BUSOUT THH Y DELAY Figure 22. Initialization Sequence Section 4.2.1.10 for fur- WAIT FOR NEXT DSI BUS COMMAND MMA16xxKW 31 ...

Page 32

... NVM Program Enable. This bit indicates whether programming of the user-programmable OTP locations is enabled OTP programming Enabled 0 - OTP programming Disabled A[3:0] DSI device address. This field contains the device address. Shaded bits are transmitted to meet the response message length of the received message MMA16xxKW 32 Address D[2] D[1] D[0] A[3] ...

Page 33

... The device truncates the LSBs for Acceleration Data Responses of length less than 10. If the result of the truncation is 0, the minimum acceleration value is transmitted as defined in Sensors Freescale Semiconductor, Inc. Address D[2] D[1] D[0] A[3] A[2] A[1] A[3] A[2] A[1] Definition Response D[9] D[8] D[7] D[6] AD[9] AD[8] AD[9] AD[8] AD[7] AD[9] AD[8] AD[7] AD[ Response D[9] D[8] D[7] D[6] D[5] S AD[9] AD[8] AD[7] AD[6] AD[5] Definition Section 3.1.4.2) Table 26. Section 4.2.1.11) Section 4.2.1.11) Command A[0] C[3] C[2] C[1] C[0] A[ D[5] D[4] D[3] D[2] D[1] D[0] AD[7] AD[6] AD[5] AD[4] AD[3] AD[2] AD[6] AD[5] AD[4] AD[3] AD[2] AD[1] AD[5] AD[4] AD[3] AD[2] AD[1] AD[0] D[4] D[3] D[2] D[1] D[0] AD[4] AD[3] AD[2] AD[1] AD[0] MMA16xxKW CRC bits CRC bits CRC bits 33 ...

Page 34

... DSI Command #3 DSI Command ‘0011’ is not implemented. The device ignores all command formats with a command ID of ‘0011’. MMA16xxKW 34 10-Bit Data Value Hex Decimal Hex 0x1FF 1023 0x3FF Maximum positive acceleration value Positive acceleration values ...

Page 35

... DSI Command ‘0110’ is not implemented. The device ignores all command formats with a command ID of ‘0110’. Sensors Freescale Semiconductor, Inc. Address D[2] D[1] D[0] A[3] A[2] A[1] A[3] A[2] A[1] Definition Response D[9] D[8] D[7] D[6] D[ Response D[9] D[8] D[7] D[6] D[ V[2] V[1] V[0] Definition Section 4.2.1.11) Section 4.2.1.11) Command A[0] C[3] C[2] C[1] C[0] A[ CRC D[4] D[3] D[2] D[1] D[0] 0 DEVID bits D[4] D[3] D[2] D[1] D[0] 0 DEVID MMA16xxKW CRC bits CRC bits 35 ...

Page 36

... DSI device address. This field contains the device address. This field must match the internal programmed address field or the Global A[3:0] Device Address of ‘0000’. Otherwise, the command is ignored. D[7:0] Used for CRC calculation only 4.2.1.9 DSI Command #8 DSI Command ‘1000’ is not implemented. The device ignores all command formats with a command ID of ‘1000’. MMA16xxKW 36 BSOPEN Address D[1] D[0] A[3] A[2] ...

Page 37

... Data D[10] D[9] D[8] D[7] D[6] D[5] WA[2] WA[1] WA[ Bnk[1] Data D[10] D[9] D[8] D[7] D[6] D[ Definition voltage when programming the OTP array. No internal verification of PP Section 3.2.2). Section 4.2.1.11) Table 39. Command A[0] C[3] C[2] C[1] C[0] A[ D[4] D[3] D[2] D[1] D[0] Bnk[0] RD[3] RD[2] RD[1] RD[0] D[4] D[3] D[2] D[1] D[ A[3] A[2] A[1] A[0] Section 4.2.1.1). If the times the number of bits PROG_BIT MMA16xxKW CRC bits CRC bits CRC bits 37 ...

Page 38

... MMA16xxKW 38 Register 0 UNUSED No Write to NVM executed, Normal Response: RD[3:0] = Device Address ADDR[3: UNUSED No Write to NVM executed, Normal Response: RD[3:0] = Device Address ADDR[3: UNUSED No Write to NVM executed, Normal Response: RD[3:0] = Device Address ADDR[3:0] 1 DEVCFG2[7] ...

Page 39

... The reset values assigned to each DSI Standard Values Definition CRC Polynomial = Seed = ‘1010’ CRC Length = Short Command Length = N N/A MMA16xxKW CRC bits CRC bits ...

Page 40

... Bit Field RD7:0] RD[7:0] contains the data of the register addressed by RA[3:0]. RA[3:0] RA[3:0] contains the byte address of the register to be read. DSI device address. This field contains the device address. This field must match the internal programmed address field. Otherwise, the A[3:0] command is ignored. MMA16xxKW 40 Table Address D[2] D[1] D[0] A[3] ...

Page 41

... Freescale Semiconductor, Inc specified in ST_DEACT_xxx Address D[2] D[1] D[0] A[3] A[2] A[1] A[3] A[2] A[1] Definition Response D[9] D[8] D[7] D[6] D[ Data D[9] D[8] D[7] D[6] D[ Definition Section 3.1.4.2) Section Section 4.2.1.11) Section 4.2.1.11) Section 2. Command A[0] C[3] C[2] C[1] C[0] A[ CRC D[4] D[3] D[2] D[1] D[0] BS AT[1] AT[ bits D[4] D[3] D[2] D[1] D[0] BS AT[1] AT[ Refer to Section 3.3.2 for details. MMA16xxKW CRC bits CRC bits 41 ...

Page 42

... This bit is set if the voltage at HCAP is below the threshold specified in NVM Program Enable. This bit indicates whether programming of the user-programmable OTP locations is enabled OTP programming Enabled 0 - OTP programming Disabled A[3:0] DSI device address. This field contains the device address. MMA16xxKW specified in Section ST_ACT_xxx Address D[2] ...

Page 43

... PORCREGA_r returns above HCAP HCAP_POR returns above HCAP HCAP_POR until VHCAP HCAP_POR , or an internal supply under-voltage condition . BSOPEN returns above V HCAP PORHCAP_r until the POR_CAPTEST . BSOPEN until the BUSIN supply under-voltage condition occurs. THF . BSOPEN returns above V BUSIN THF MMA16xxKW 43 ...

Page 44

... Reference Freescale Case Outline Drawing # 98ASA00090D http://www.freescale.com/files/shared/doc/package_info/98ASA00090D.pdf 5.2 Recommended Footprint Reference Freescale Application Note AN3111, latest revision: http://www.freescale.com/files/sensors/doc/app_note/AN3111.pdf Table 60. Revision History Revision Revision number date 4 03/2012 • Added SafeAssure logo, changed first paragraph and disclaimer to include trademark information. MMA16xxKW 44 Description of changes Freescale Semiconductor, Inc. Sensors ...

Page 45

... RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http:/www.freescale.com or contact your Freescale sales representative. For information on Freescale’s Environmental Products program http://www.freescale.com/epp. MMA16xxKW Rev. 4 03/2012 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products ...

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