S908QC16CDRE FREESCALE [Freescale Semiconductor, Inc], S908QC16CDRE Datasheet - Page 221
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S908QC16CDRE
Manufacturer Part Number
S908QC16CDRE
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.S908QC16CDRE.pdf
(274 pages)
- Current page: 221 of 274
- Download datasheet (4Mb)
The break interrupt timing is:
By updating a break address and clearing the BRKA bit in a break interrupt routine, a break interrupt can
be generated continuously.
A break address should be placed at the address of the instruction opcode. When software does not
change the break address and clears the BRKA bit in the first break interrupt routine, the next break
interrupt will not be generated after exiting the interrupt routine even when the internal address bus
matches the value written in the break address registers.
18.2.1.1 Flag Protection During Break Interrupts
The system integration module (SIM) controls whether or not module status bits can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state. See
for each module.
18.2.1.2 TIM1 During Break Interrupts
A break interrupt stops the timer counter and inhibits input captures.
18.2.1.3 COP During Break Interrupts
The COP is disabled during a break interrupt with monitor mode when BDCOP bit is set in break auxiliary
register (BRKAR).
Freescale Semiconductor
•
•
•
When a break address is placed at the address of the instruction opcode, the instruction is not
executed until after completion of the break interrupt routine.
When a break address is placed at an address of an instruction operand, the instruction is executed
before the break interrupt.
When software writes a 1 to the BRKA bit, the break interrupt occurs just before the next instruction
is executed.
ADDRESS BUS[15:0]
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 2
Figure 18-2. Break Module Block Diagram
ADDRESS BUS[15:8]
ADDRESS BUS[7:0]
14.8.2 Break Flag Control Register
BREAK ADDRESS REGISTER HIGH
BREAK ADDRESS REGISTER LOW
8-BIT COMPARATOR
8-BIT COMPARATOR
CAUTION
and the Break Interrupts subsection
CONTROL
BKPT
(TO SIM)
Break Module (BRK)
221
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