ICS501-DPK ICST [Integrated Circuit Systems], ICS501-DPK Datasheet

no-image

ICS501-DPK

Manufacturer Part Number
ICS501-DPK
Description
LOCO PLL CLOCK MULTIPLIER
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
MDS 501 K
I n t e gra te d C i r c u i t S y s t e m s
Description
The ICS501 LOCO
generate a high-quality, high-frequency clock output
from a lower frequency crystal or clock input. The name
LOCO stands for Low Cost Oscillator, as it is designed
to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques,
the device uses a standard fundamental mode,
inexpensive crystal to produce output clocks up to 160
MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to
output many common frequencies (see table on page
2).
The device also has an output enable pin which
tri-states the clock output when the OE pin is taken low.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed.
For applications which require defined input to output
skew, use the ICS570B.
Block Diagram
Clock input
Crystal or
Optional crystal capacitors
TM
X1/ICLK
is the most cost effective way to
X2
S1:0
5 25 Race Stre et, San Jo se, CA 9 5126
2
Oscillator
Crystal
1
LOCO™ PLL C
Features
PLL Clock
and ROM
Multiplier
GND
VDD
Circuitry
Packaged as 8-pin SOIC or die
Available in Pb (lead) free package
ICS’ lowest cost PLL clock
Zero ppm multiplication error
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 160 MHz
Extremely low jitter of 25 ps (one sigma)
Compatible with all popular CPUs
Duty cycle of 45/55 up to 160 MHz
Nine selectable frequencies
Operating voltage of 3.3V or 5.5V
Tri-state output for board level testing
25mA drive capability at TTL levels
Ideal for oscillator replacement
Industrial temperature version available
Advanced, low-power CMOS process
te l (40 8) 2 97-12 01
OE
LOCK
M
CLK
ICS501
ULTIPLIER
w w w. i c st . c o m
Revision 071304

Related parts for ICS501-DPK

ICS501-DPK Summary of contents

Page 1

... Description TM The ICS501 LOCO is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, ...

Page 2

... 100 106.25 120 Pin Description Revision 071304 tel (4 08) 297 -1 201 ● ● ICS501 62 125 ...

Page 3

... ICS501 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and the GND. It must be connected close to the ICS501 to minimize lead inductance. No external power supply filtering is required for the ICS501. Series Termination Resistor A 33Ω terminating resistor can be used next to the CLK pin for trace lengths over one inch ...

Page 4

... Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS501. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...

Page 5

... V, Note 2.0 to 8.0 V, Note 1 160 MHz t Deviation from ja mean 08) 297 -1 201 ● ICS501 LOCO™ PLL Clock Multiplier Typ. Max. Units 270 kΩ Ω 20 Min. Typ. Max. Units 5 27 MHz 2 50 ...

Page 6

... ICS501MLFT 501MLF ICS501-DWF - ICS501-DPK - “LF” denotes Pb (lead) free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Related keywords