ICS508-DPK ICST [Integrated Circuit Systems], ICS508-DPK Datasheet - Page 4
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ICS508-DPK
Manufacturer Part Number
ICS508-DPK
Description
PECL to CMOS Converter
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
1.ICS508-DPK.pdf
(5 pages)
Electrical Specifications
MDS 508 C
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
Parameter
AC CHARACTERISTICS (VDDP = VD D DC = 3.3V unless oth h erwise note e d)
Input Frequency
Output Clock Rise Time, 0.8 to 2 V
Output Clock Fall Time, 2 V to 0.8 V
Output Enable Time, OE high to ouput on
Output Disable Time, OE low to tri-state
Propagation Delay
Output Clock Duty Cycle, 0-100 MHz
Output Clock Duty Cycle, 100-166 MHz
Output Clock Duty Cycle, 166-250 MHz
PRELIMINARY INFORMATION
Conditions
VDDC = 5 V
VDDC = 3.3 V
VDDC = 2.5 V
VDDC = 5 V
VDDC = 3.3 V
VDDC = 2.5 V
VDDP=5 V, VDDC=5 V
VDDP=5 V, VDDC=3.3 V
VDDP=5 V, VDDC=2.5 V
VDDP=3.3 V, VDDC=3.3 V
VDDP=3.3 V, VDDC=2.5 V
Any VDD combination
VDDP=5 V, VDDC=5 V
VDDP=5 V, VDDC=3.3 V
VDDP=5 V, VDDC=2.5 V
VDDP=3.3 V, VDDC=3.3 V
VDDP=3.3 V, VDDC=2.5 V
VDDP=5 V, VDDC=5 V
VDDP=5 V, VDDC=3.3 V
VDDP=5 V, VDDC=2.5 V
VDDP=3.3 V, VDDC=3.3 V
VDDP=3.3 V, VDDC=2.5 V
4
PECL to CMOS Converter
Minimum
45
45
45
40
40
45
40
40
35
35
40
0
Revision 012400
Typical
0.4
0.6
0.4
0.6
4.5
5.5
4.5
5.5
1
1
7
7
4
Maximum
250
20
20
55
55
55
60
60
55
60
60
65
65
60
6
7
9
7
9
Printed 11/13/00
ICS508
Units
M H z
%
%
%
%
%
%
%
%
%
%
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns