ICS830-23I ICST [Integrated Circuit Systems], ICS830-23I Datasheet - Page 7

• Manufacturer Part Number: ICS830-23I
• Description: DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER
• Manufacturer: ICST [Integrated Circuit Systems]

R
I
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1k
CLK to ground.
83023AMI
W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The
NPUTS
ECOMMENDATIONS FOR
IRING THE
:
NPUT
D
Integrated
Circuit
Systems, Inc.
IFFERENTIAL
:
U
NUSED
I
NPUT TO
F
IGURE
Single Ended Clock Input
resistor can be tied from
I
1. S
NPUT AND
A
A
www.icst.com/products/hiperclocks.html
CCEPT
PPLICATION
INGLE
E
O
C1
0.1u
NDED
S
UTPUT
INGLE
V_REF
DD
S
D
/2 is
IGNAL
IFFERENTIAL
E
P
NDED
7
INS
I
D
ratio of R1 and R2 might need to be adjusted to position the
V_REF in the center of the input voltage swing. For example, if
the input clock swing is only 2.5V and V
be 1.25V and R2/R1 = 0.609.
NFORMATION
O
LVCMOS O
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
RIVING
1K
R1
1K
R2
UTPUTS
VDD
L
EVELS
D
IFFERENTIAL
CLK
nCLK
-
:
TO
UTPUT
-LVCMOS T
:
I
NPUT
RANSLATOR
DD
ICS83023I
= 3.3V, V_REF should
D
REV. B JANUARY 18, 2006
UAL
/B
, 1-
UFFER
TO
-1