MC74LCX32DTG ON Semiconductor, MC74LCX32DTG Datasheet - Page 2

IC GATE OR QUAD 2INPUT 14-TSSOP

MC74LCX32DTG

Manufacturer Part Number
MC74LCX32DTG
Description
IC GATE OR QUAD 2INPUT 14-TSSOP
Manufacturer
ON Semiconductor
Series
74LVXr
Datasheet

Specifications of MC74LCX32DTG

Logic Type
OR Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Product
OR
Logic Family
74LCX
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
6.2 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74LCX32DTG
Manufacturer:
ON Semiconductor
Quantity:
64
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I
PIN NAMES
MAXIMUM RATINGS
Symbol
Figure 1. Pinout: 14−Lead (Top View)
An, Bn
On
V
V
V
I
I
I
I
I
T
IK
OK
O
CC
GND
STG
CC
I
O
V
O
A0
14
CC
1
absolute maximum rating must be observed.
A2
B0
13
Pins
2
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
O0
B2
12
3
O2
A1
11
4
Parameter
Data Inputs
Outputs
A3
10
B1
5
O1
B3
9
6
Function
GND
O3
8
7
−0.5
http://onsemi.com
−0.5
MC74LCX32
−0.5 to +7.0
−65 to +150
V
Value
O
−50
−50
+50
100
100
V
50
I
2
V
CC
+7.0
+ 0.5
H = High Voltage Level
L = Low Voltage Level
For I
TRUTH TABLE
An
CC
H
H
L
L
A0
B0
A1
B1
A2
B2
A3
B3
Output in HIGH or LOW State.(Note 1)
reasons, DO NOT FLOAT Inputs
Inputs
1
2
4
5
13
12
10
9
Bn
Figure 2. Logic Diagram
H
H
L
L
Condition
V
V
V
O
I
O
< GND
< GND
> V
CC
Outputs
On
H
H
H
L
11
3
6
8
O0
O1
O2
O3
Unit
mA
mA
mA
mA
mA
mA
V
V
V
C

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