ICS9169CF-231 ICST [Integrated Circuit Systems], ICS9169CF-231 Datasheet - Page 2
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ICS9169CF-231
Manufacturer Part Number
ICS9169CF-231
Description
Frequency Generator for Pentium Based Systems
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
1.ICS9169CF-231.pdf
(8 pages)
ICS169C-231
* The internal pull up will vary from 350K to 500K based on temperature
Pin Descriptions
17,18,20,21,23, 24
PIN NUMBER
6,7,9,10,15
4,11,16,22
5,12,13
5,12,13
14
19
25
26
27
28
1
2
3
8
VDD1
X1
X2
GND
CPU(2,3,4,5,8)
CPU1, CPU6,
CPU7
FS (0:2)
VDD2
VDD3
BUS(1:6)
VDD4
VDD5
24 MHz
48 MHz
REF
BSEL
PIN NAME
TYPE
PWR
PWR
PWR
PWR
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
Power for control logic and crystal oscillator circuit and
14.318 MHz output
XTAL or external reference frequency input. This input includes XTAL
load capacitance and feedback bias for a 12-16MHz crystal, nominally
14.31818mhz. External crystal load of 30pF to GND recommended for
VDD power on faster than 2.0ms.
XTAL output drive from device. XTAL output which includes XTAL load
capacitance. External crystal load of 10pF to GND recommended for VDD
power on faster than 2.0ms.
Ground for control logic.
Processor clock outputs which are a multiple of the input reference clock
as shown in the preceding table.
Processor clock outputs which are a multiple of the input reference clock
as shown in the preceding table.
Frequency multiplier select pins. See shared pin programming description
later in this data sheet for further explanation. 350K* internal pull up.
Power for CPU (1:6) clock buffers only. This VDD supply can be reduced
to 2.5V for CPU (1:6) outputs.
Power for CPU (7:8) clock buffers and internal PLL and Core logic. Must
be nominal 3.3V (3.0 to 3.7V)
BUS clock outputs which are a multiple of the input reference clock as
shown in the preceding table.
Power for BUS clock buffers BUS (1:6)
Power for fixed clock buffer (48 MHz, 24 MHz)
Fixed 24 MHz clock (assuming a 14.31818 MHz REF frequency).
Fixed 48 MHz clock (assuming a 14.31818 MHz REF frequency).
Fixed 14.31818 MHz clock (assuming a 14.31818 MHz REF frequency).
Selection for synchronous or asynchronous bus clock operation. 350K*
internal pull up.
2
DESCRIPTION