CAT1022 CATALYST [Catalyst Semiconductor], CAT1022 Datasheet - Page 6

• Manufacturer Part Number: CAT1022
• Description: Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer
• Manufacturer: CATALYST [Catalyst Semiconductor]

RELIABILITY CHARACTERISTICS
Notes:
1. Test Conditions according to “AC Test Conditions” table.
2. Power-up, Input Reference Voltage V
3. Power-Down, Input Reference Voltage V
4. V
5. This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
6. t
7. Latch-up protection is provided for stresses up to 100 mA on input and output pins from -1 V to V
CAT1021, CAT1022, CAT1023
AC TEST CONDITIONS
Doc. No. 3009, Rev. K
RESET CIRCUIT AC CHARACTERISTICS
P
Symbol
N
T
V
I
LTH
O
M
DR
ZAP
END
S
S
PUR
R
CC
W
t
y
t
y
G
t
(5)
(5)(7)
P
t
t
t
t
m
m
M
t
M
P
U
R
L
P
(5)
O
W
l G
(5)
U
Glitch Reference Voltage = V
T I
R
E
R
P
R
U
and t
n I
n I
D
W
b
W
b
S
D
C
R
u
D
R
c t i
T
H
p
l o
l o
p
p t
n I
t u
-
t u
h
PUW
t u
p
U
t u
R
R
P
R
O
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
P
e
s i
are the delays required from the time V
P
e
u
e f
M
a
I T
e
e f
u
p t
a r
e r
M
R
s l
V
P
P
a
e r
t u
M
V
m
C
n
a
e
n
o
o
n I
T
C
n
n
d
c
w
H
N I
w
L
t e
V
c
p
e
l G
u
o
o t
e
e
F
e
l o
t u
W
r e
l a
a
G
- r
- r
V
l a
c t i
M
a t
V
d
R
a
U
l o
R
U
R
o t
i t l
5
l o
h
R
g
c t
E
6 ,
p
P
e
P
p
a t
e
e
a t
m
s
R
S
R
h
a
s
a
P
o t
o t
g
s
t e
d
t e
g
a r
E
E
a r
THmin
e
e
e
u
o
e
s
T
e j
S
R
W
s
s l
m
i T
m
g
l G
s
CC
E
t c
e
e
O
i r
m
t e
i T
t e
; Based on characterization data
a
T
c t i
e t
u
W
= V
CC
P
d
e
m
r e
r e
MIL-STD-883, Test Method 1033 1,000,000
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
p t
O
h
o
u
d i
O
O
e
= V
TH
u
t u
t u
s l
I
h t
o
p
p
m
p t
e
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table
t u
r e
Reference Test Method
r e
TH
D
m
t u
W
e
t a
t a
JEDEC Standard 17
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table
u
a l
d i
D
n
o i
o i
y
e
h t
y t i
CC
n
n
C
a l
r u
is stable until the specified memory operation can be initiated.
y
e r
0
T
t n
0
2 .
e
C
C
3 .
C
t s
S
N
o
o
V
L
N
N
o
6
N
N
N
N
V
n
o
n
T
T
0
C
=
C
u
o
o
e t
d
d
o
o
o
o
1
C
C
e
e
5 .
c r
C
e t
e t
o
e t
e t
e t
e t
0
t i
t i
t s
t s
o t
1
, 4
,
n
o i
o i
: e
V
n
0
0
2
3
1
1
1
1
d
0
s
C
0
n
n
5
7 .
t i
C
8 .
I
s
s
p
o i
O
V
L
F
V
n
C
=
C
C
s
C
3
m
M
M
1
1
5
3
; A
0 .
n i
n i
0
2000
Min
100
100
CC
T
T
2
1
y
0
y
+ 1 V.
6 .
p
p
0
Max
M
M
2
2
2
1
2
3
7
5
0
7
7
a
1
3 .
a
0
0
0
0
0
x
x
Cycles/Byte
Years
Units
Volts
mA
U
U
s
m
m
m
µ
µ
µ
i n
n
n
i n
e
s
s
s
s
s
s
s
s
c
s t
s t