CY7C144AV CYPRESS [Cypress Semiconductor], CY7C144AV Datasheet - Page 15

• Manufacturer Part Number: CY7C144AV
• Description: 3.3V 8K/16K x 8 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Left Address Valid First
Document #: 38-06051 Rev. *E
CE
CE
Right Address Valid First:
Note
37. If t
L
ADDRESS
ADDRESS
R
Valid First:
ADDRESS
ADDRESS
ADDRESS
ADDRESS
Valid First:
PS
BUSY
BUSY
BUSY
BUSY
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
CE
CE
CE
CE
L,R
L,R
R
R
R
L
L
L
R
L
R
R
L
L
Figure 11. Busy Timing Diagram No.2 (Address Arbitration)
(continued)
Figure 10. Busy Timing Diagrfam No.1 (CE Arbitration)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
t
t
BHC
BHC
[37]
[37]
CY7C144AV
CY7C006AV
Page 15 of 21
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