VSC8117QP2 VITESSE [Vitesse Semiconductor Corporation], VSC8117QP2 Datasheet - Page 11

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VSC8117QP2

Manufacturer Part Number
VSC8117QP2
Description
ATM/SONET/SDH 622/155 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery
Manufacturer
VITESSE [Vitesse Semiconductor Corporation]
Datasheet
VSC8117
G52221-0, Rev. 4.1
1/8/00
Data Sheet
Table 7: Receive Data Output Timing Table (STS-3 Operation)
Data Latency
part. Table 10 bounds the data latency through each path with an associated clock signal.
Table 8: Data Latency
Clock Recovery Unit
Table 9: Reference Frequency for the CRU
Clock Multiplier Unit
Table 10: Reference Frequency Selection and Output Frequency Control
Parameter
Circuit Mode
T
T
T
The VSC8117 contains several operating modes, each of which exercise different logic paths through the
RXLSCKT
RXCLKIN
RXVALID
Loopback
Facilities
Receive
T
PW
Receive clock period
Receive data output byte clock period
Time data on RXOUT [7:0] and FP is valid before and
after the rising edge of RXLSCKOUT
Pulse width of frame detection pulse FP
MSB at RXDATAIN to MSB at TXDATAOUT
MSB at RXDATAIN to data on RXOUT [7:0]
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
CRUREFSEL
STS12
1
1
0
0
1
1
0
VITESSE
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
Description
CMUFREQSEL
Description
STS12
ATM/SONET/SDH 622/155 Mb/s Transceiver Mux/Demux
Uses CMU’s Reference Clock (See Table 10 below)
1
0
1
0
1
0
with Integrated Clock Generation and Clock Recovery
CRUREFCLK
77.76 ± 500ppm
77.76 ± 500ppm
Frequency
[MHz]
Frequency
Reference
[MHz]
19.44
77.76
19.44
77.76
Min
22
-
-
-
Frequency
Output
[MHz]
Reference
RXCLKIN
RXCLKIN
622.08
155.52
Frequency
51.44
51.44
Output
6.43
Clock
Typ
[MHz]
622.08
622.08
155.52
155.52
-
Max
-
-
-
-
Range of Clock
cycles
25-35
2-4
Units
ns
ns
ns
ns
Page 11

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