AD9516-0_07 AD [Analog Devices], AD9516-0_07 Datasheet - Page 55

• Manufacturer Part Number: AD9516-0_07
• Description: 14-Output Clock Generator with Integrated 2.8 GHz VCO
• Manufacturer: AD [Analog Devices]

Table 50. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
t
DS
DH
CLK
S
C
HI
LO
DV
SCLK
SDIO
CS
Description
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Period of the clock
Setup time between CS falling edge and SCLK rising edge (start of communication cycle)
Setup time between SCLK rising edge and CS rising edge (end of communication cycle)
Minimum period that SCLK should be in a Logic High state
Minimum period that SCLK should be in a Logic Low state
SCLK to valid SDIO and SDO (see Figure 65)
t
t
DS
S
BI N
t
HI
t
DH
Figure 67. Serial Control Port Timing—Write
t
CLK
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t
LO
BI N + 1
t
C
AD9516-0