CY7C148-35DMB CYPRESS [Cypress Semiconductor], CY7C148-35DMB Datasheet

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CY7C148-35DMB

Manufacturer Part Number
CY7C148-35DMB
Description
1Kx4 Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-05059 Rev. **
Features
Functional Description
The CY7C148 and CY7C149 are high-performance CMOS
static RAMs organized as 1024 by 4 bits. Easy memory expan-
Selection Guide
• Automatic power-down when deselected (7C148)
• CMOS for optimum speed/power
• 25-ns access time
• Low active power
• Low standby power (7C148)
• 5-volt power supply 10% tolerance, both commercial
• TTL-compatible inputs and outputs
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum Standby
Current (mA)
Logic Block Diagram
and military
— 440 mW (commercial)
— 605 mW (military)
— 82.5 mW (25-ns version)
— 55 mW (all others)
A
A
A
A
A
A
9
8
7
6
5
4
A
INPUTBUFFER
3
DECODER
Commercial
Military
Commercial
Military
COLUMN
A
64 x 64
ARRAY
2
A
1
A
0
POWER
(7C148)
DOWN
7C148 25
3901 North First Street
25
90
15
7C148 35
110
35
80
10
10
C148–1
I/O
I/O
I/O
I/O
CS
WE
sion is provided by an active LOW chip select (CS) input and
three-state outputs. The CY7C148 remains in a low-power
mode as long as the device remains unselected; i.e., (CS) is
HIGH, thus reducing the average power requirements of the
device. The chip select (CS) of the CY7C149 does not affect
the power dissipation of the device.
Writing to the device is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
I/O pins (I/O
tions specified on the address pins (A
Reading the device is accomplished by taking chip select (CS)
LOW while write enable (WE) remains HIGH. Under these
conditions, the contents of the location specified on the
address pins will appear on the four data I/O pins.
The I/O pins remain in a high-impedance state when chip se-
lect (CS) is HIGH or write enable (WE) is LOW.
0
1
2
3
Pin Configurations
7C148 45
110
45
80
10
10
San Jose
0
GND
through I/O
CS
A 6
A 5
A 4
A 3
A 0
A 1
A 2
A 13
A 10
A 11
A 12
A 4
1
2
3
4
5
6
7
8
9
7C149 25
3
4
5
6
7
Top View
Top View
2 1
8 9
DIP
LCC
25
90
1011
1817
3
) is written into the memory loca-
16
15
14
13
12
1Kx4 Static RAM
18
17
16
15
14
13
12
11
10
CA 95134
I/O 1
A 8
A 9
I/O 0
I/O 2
Revised September 18, 2001
C148–3
C148–2
V CC
A 7
A 8
A 9
I/O 0
I/O 1
I/O 2
I/O 3
WE
7C149 35
110
35
80
0
through A
CY7C148
CY7C149
408-943-2600
7C149 45
9
110
45
80
).
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CY7C148-35DMB Summary of contents

Page 1

... Cypress Semiconductor Corporation Document #: 38-05059 Rev. ** sion is provided by an active LOW chip select (CS) input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the device. The chip select (CS) of the CY7C149 does not affect the power dissipation of the device ...

Page 2

... CC IH Only Mil GND < V < V Com’ Mil Test Conditions MHz 5.0V CC power-up. Otherwise current will exceed values given (CY7C148 CC CY7C148 CY7C149 Ambient Temperature + 10 +125 C 5V 10% 7C148 25 7C148 35, 45 7C149 25 7C149 35, 45 Min ...

Page 3

... Transition is measured 500 mV from steady-state voltage with specified HZ LZ CY7C148 CY7C149 ALL INPUT PULSES 90% 90% 10% 10% < C148–5 7C148 35 7C148 45 7C149 35 7C149 45 Min. Max. Min. Max. Unit 35 ...

Page 4

... Document #: 38-05059 Rev DATA VALID 50 DATA–IN VALID t WZ CY7C148 CY7C149 DATA VALID C148– HIGH IMPEDANCE t PD ICC 50% ISB C148– HIGH IMPEDANCE C148–8 Page [+] Feedback ...

Page 5

... CC V =5. 125 AMBIENT TEMPERATURE(°C) NORMALIZED ACCESS TIME vs.AMBIENT TEMPERATURE 1.6 1.4 1.2 1.0 V =5.0V CC 0.8 0 125 AMBIENT TEMPERATURE(°C) CY7C148 CY7C149 HIGH IMPEDANCE C148–9 OUTPUT SOURCE CURRENT vs.OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE(V) OUTPUT SINK CURRENT vs ...

Page 6

... SUPPLY VOLTAGE(V) Ordering Information Speed Package (ns) Ordering Code Name 25 CY7C148 25PC P3 35 CY7C148 35PC P3 CY7C148 35DMB D4 45 CY7C148 45PC P3 CY7C148 45DMB D4 Speed Package (ns) Ordering Code Name 25 CY7C149 25PC P3 35 CY7C149 35PC P3 CY7C149 35DMB D4 CY7C149 35LMB L50 45 CY7C149 45PC P3 CY7C149 45DMB D4 CY7C149 45LMB L50 Document #: 38-05059 Rev ...

Page 7

... ACS 10 WRITE CYCLE Notes: 14. 7C148 only. 15. 7C149 only. CY7C148 CY7C149 Page [+] Feedback ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 18–Pin Rectangular Leadless ChipCarrier L50 MIL STD 1835 C 10A 18–Lead(300–Mil) Molded DIP P3 CY7C148 CY7C149 Page [+] Feedback ...

Page 9

... Document Title: CY7C148 / CY7C149 Static RAM Document Number: 38-05059 Issue Orig. of REV. ECN NO. Date Change ** 110170 09/29/01 SZV Document #: 38-05059 Rev. ** Description of Change Change from Spec number: 38-00031 to 38-05059 CY7C148 CY7C149 Page [+] Feedback ...

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