74HC/HCT377 PHILIPS [NXP Semiconductors], 74HC/HCT377 Datasheet

no-image

74HC/HCT377

Manufacturer Part Number
74HC/HCT377
Description
Octal D-type flip-flop with data enable; positive-edge trigger
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Product specification
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT377
Octal D-type flip-flop with data
enable; positive-edge trigger
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
December 1990

Related parts for 74HC/HCT377

74HC/HCT377 Summary of contents

Page 1

... For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT377 Octal D-type flip-flop with data enable; positive-edge trigger Product specification File under Integrated Circuits, IC06 ...

Page 2

... See “74HC/HCT/HCU/HCMOS Logic Package Information” December 1990 GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT377 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs ...

Page 3

... December 1990 SYMBOL NAME AND FUNCTION E data enable input (active LOW flip-flop outputs data inputs 0 7 GND ground ( clock input (LOW-to-HIGH, edge-triggered) V positive supply voltage CC Fig.2 Logic symbol. 3 Product specification 74HC/HCT377 Fig.3 IEC logic symbol. ...

Page 4

... HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition = LOW-to-HIGH CP transition X = don’t care Fig.5 Logic diagram. 4 Product specification 74HC/HCT377 INPUTS OUTPUTS ...

Page 5

... Product specification 74HC/HCT377 . TEST CONDITIONS UNIT WAVEFORMS 125 (V) 240 ns 2.0 Fig.6 48 4.5 41 6.0 110 ns 2.0 Fig.6 22 4.5 19 6.0 ns 2.0 Fig.6 4.5 6.0 ns 2.0 Fig.7 4.5 6.0 ns 2.0 Fig.7 4.5 6.0 ns 2.0 Fig.7 4 ...

Page 6

... Product specification 74HC/HCT377 . TEST CONDITIONS UNIT WAVEFORMS 125 ( 4.5 Fig 4.5 Fig.6 ns 4.5 Fig.6 ns 4.5 Fig.7 ns 4.5 Fig.7 ns 4.5 Fig.7 ns 4.5 Fig.7 MHz 4 ...

Page 7

... Waveforms showing the data set-up and hold times from the data input (D (E) to the clock (CP). PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” December 1990 ) propagation delays, the clock pulse width, output n ) and from the data enable input Product specification 74HC/HCT377 ...

Related keywords