CY7C4201 CYPRESS [Cypress Semiconductor], CY7C4201 Datasheet
CY7C4201
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CY7C4201 Summary of contents
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... Synchronous FIFOs Features • High-speed, low-power, First-In, First-Out (FIFO) memories — 64 × 9 (CY7C4421) — 256 × 9 (CY7C4201) — 512 × 9 (CY7C4211) — 1K × 9 (CY7C4221) — 2K × 9 (CY7C4231) — 4K × 9 (CY7C4241) — 8K × 9 (CY7C4251) • High-speed 100-MHz operation (10 ns Read/Write cycle time) • ...
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... Minimum Data or Enable Set-up Minimum Data or Enable Hold Maximum Flag Delay Active Power Supply Current Commercial Industrial CY7C4421 CY7C4201 Density 64 × 9 256 × 9 Functional Description The CY7C42X1 provides four status pins: Empty, Full, Almost Empty, Almost Full. The Almost Empty/Almost Full flags are programmable to single word granularity. The programmable flags default to Empty – ...
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When the device is configured for programmable flags and both WEN2/LD and WEN1 are LOW, the first LOW-to-HIGH transition of WCLK writes data from the data inputs to the empty offset least significant bit (LSB) register. The second, third, and ...
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... PAF. PAE is synchro- nized to the LOW-to-HIGH transition of WCLK by one flip-flop and is set LOW when the number of unread words in the FIFO is greater than or equal to CY7C4421. (64 – m), CY7C4201 Table 2. Status Flags Number of Words in FIFO CY7C4421 ...
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Width Expansion Configuration Word width may be increased simply by connecting the corre- sponding input controls signals of multiple devices. A composite flag should be created for each of the end-point status flags (EF and FF). The partial status flags ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ...................................–65 Ambient Temperature with Power Applied...............................................–55 Supply Voltage to Ground Potential ............... –0.5V to +7.0V DC Voltage Applied to Outputs in High-Z ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Input Leakage IX Current [6] I Output Short OS Circuit Current ...
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Switching Characteristics Over the Operating Range Parameter Description t Data Hold Time DH t Enable Set-up Time ENS t Enable Hold Time ENH [12] t Reset Pulse Width RS t Reset Set-up Time RSS t Reset Recovery Time RSR t ...
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Switching Waveforms (continued) Read Cycle Timing RCLK t t ENS REN1,REN2 EF Q – OLZ OE WCLK WEN1 WEN2 [16] Reset Timing RS REN1, REN2 WEN1 [17] WEN2/LD EF,PAE FF,PAF Notes: 14. ...
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Switching Waveforms (continued) First Data Word Latency after Reset with Simultaneous Read and Write WCLK – (FIRST ENS WEN1 WEN2 (if applicable) RCLK EF REN1, REN2 Q – Empty ...
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Switching Waveforms (continued) Full Flag Timing NO Write WCLK [14] t SKEW1 D – WEN1 WEN2 (if applicable) RCLK t ENS REN1, REN2 LOW OE Q –Q DATA IN OUTPUT REGISTER 0 8 Programmable Almost Empty Flag ...
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... If a Write is performed on this rising edge of the Write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW. 25. PAF offset = m. 26. 64-m words for CY7C4421, 256 – m words in FIFO for CY7C4201, 512 – m words for CY7C4211, 1024 – m words for CY7C4221, 2048 – m words for CY7C4231, 4096 – m words for CY7C4241, 8192 – m words for CY7C4251. ...
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Switching Waveforms (continued) Read Programmable Registers t CLK t CLKH RCLK t ENS WEN2/LD t ENS REN1, REN2 Q – Document #: 38-06016 Rev. *A CY7C4421/4201/4211/4221 t CLKL t ENH t A UNKNOWN PAE OFFSET LSB CY7C4231/4241/4251 PAF ...
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Typical AC and DC Characteristics NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 1 100 MHz 0.6 4 4.5 5 5.5 6 SUPPLY VOLTAGE (V) NORMALIZED t vs. ...
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... Ordering Code 10 CY7C4421-10AC CY7C4421-10JC 15 CY7C4421-15AC CY7C4421-15JC 256 x 9 Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4201-10AC CY7C4201-10JC 15 CY7C4201-15AC CY7C4201-15JC 25 CY7C4201-25AC CY7C4201-25JC CY7C4201-25AI 512 x 9 Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4211-10AC CY7C4211-10JC CY7C4211-10AI CY7C4211-10JI 15 CY7C4211-15AC CY7C4211-15JC CY7C4211-15AI 25 CY7C4211-25AC CY7C4211-25JC Synchronous FIFO Speed ...
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Synchronous FIFO (continued) Speed (ns) Ordering Code CY7C4231-15JC 25 CY7C4231-25AC CY7C4231-25JC Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4241-10AC CY7C4241-10JC CY7C4241-10JI 15 CY7C4241-15AC CY7C4241-15JC 25 CY7C4241-25AC CY7C4241-25JC CY7C4241-25JI Synchronous FIFO Speed ...
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Package Diagrams 32-lead Thin Plastic Quad Flatpack 7 × 7 × 1.0 mm A32 All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-06016 Rev. *A © Cypress Semiconductor Corporation, ...
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Document Title: CY7C4421/4201/4211/4221, CY7C4231/4241/4251 64/256/512/1K/2K/4K/ Synchronous FIFOs Document Number: 38-06016 Issue REV. ECN NO. Date ** 106477 09/10/01 *A 110725 03/20/02 Document #: 38-06016 Rev. *A Orig. of Change Description of Change SZV Change from Spec number: 38-00419 ...