AD8321_05 AD [Analog Devices], AD8321_05 Datasheet

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AD8321_05

Manufacturer Part Number
AD8321_05
Description
Gain Programmablea CATV Line Driver
Manufacturer
AD [Analog Devices]
Datasheet
a
DESCRIPTION
The AD8321 is a low cost digitally controlled variable gain
amplifier optimized for coaxial line driving applications such as
cable modems that are designed to the DOCSIS* (upstream)
standard. An 8-bit serial word determines the desired output gain
over a 53.4 dB range, resulting in gain changes of 0.75 dB/LSB.
The AD8321 comprises a digitally controlled variable attenuator
of 0 dB to –53.4 dB, which is preceded by a low noise, fixed
gain buffer and followed by a low distortion high power ampli­
fier. The AD8321 accepts a differential or single-ended input
signal. The output is specified for driving a 75 W load, such as
coaxial cable, although the AD8321 is capable of driving other
loads. Performance of –53 dBc is achieved with an output level
up to 11 dBm at 42 MHz bandwidth using a 9 V supply.
A key performance and cost advantage of the AD8321 results
from the ability to maintain a constant 75 W output impedance
during power-up and power-down conditions. This eliminates
the need for external 75 W termination, resulting in twice the
effective output voltage when compared to a standard opera­
tional amplifier, thus eliminating the need for a transformer.
*Data-Over-Cable Service Interface Specifications
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FEATURES
Linear in dB Gain Response Over >53 dB Range
Drives Low Distortion >11 dBm Signal into 75 � Load:
Very Low Output Noise Level
Maintains Constant 75 � Output Impedance
Upper Bandwidth: 235 MHz (Min Gain)
9 V Single Supply Operation
Power-Down Functionality
Supports SPI Interface
Low Cost
APPLICATIONS
Gain Programmable Line Driver
General Purpose IF Variable Gain Block
–53 dBc SFDR at 42 MHz
Power-Up and Power-Down Condition
No Line Transformer Required
HFC High Speed Data Modems
Interactive CATV Set-Top Boxes
CATV Plant Test Equipment
The AD8321 is packaged in a low cost 20-lead SOIC, operates
from a single +9 V supply, and has an operational temperature
range of –40∞C to +85∞C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/461-3113
VIN–
VIN+
DATEN CLK
–40
–50
–60
–70
–80
–90
Figure 1. Harmonic Distortion vs. Gain Control
0
INV
FUNCTIONAL BLOCK DIAGRAM
8
VCC
AD8321
16
© 2005 Analog Devices, Inc. All rights reserved.
Gain Programmable
GAIN CONTROL – Decimal
DATA SHIFT REGISTER
24
DATA SHIFT REGISTER
ATTENUATOR CORE
DATA LATCH
32
CATV Line Driver
SDATA
40
48
GND
f
V
(P
(P
MAX
O
IN
AD8321
IN
OUT
=
=
56
4
=
GAIN)
2MHz
137mV
–15dB
= 11d
POWER-
SWITCH
www.analog.com
DOWN/
INTER
REVERSE
AMP
64
Bm @
PWR
AMP
m)
p-p
HD3
HD2
72
VOUT
PD

Related parts for AD8321_05

AD8321_05 Summary of contents

Page 1

FEATURES Linear in dB Gain Response Over >53 dB Range Drives Low Distortion >11 dBm Signal into 75 � Load: –53 dBc SFDR at 42 MHz Very Low Output Noise Level Maintains Constant 75 � Output Impedance Power-Up and ...

Page 2

AD8321–SPECIFICATIONS Parameter INPUT CHARACTERISTICS Specified AC Voltage Noise Figure Input Resistance Input Capacitance GAIN CONTROL INTERFACE Gain Range Maximum Gain Minimum Gain Gain Scaling Factor OUTPUT CHARACTERISTICS Bandwidth (–3 dB) Bandwidth Roll-Off Bandwidth Peaking Output Offset Voltage Output Noise Spectral ...

Page 3

LOGIC INPUTS (TTL/CMOS Logic) Parameter Logic “1” Voltage Logic “0” Voltage = 5 V) CLK, SDATA, DATEN Logic “1” Current (V INH = 0 V) CLK, SDATA, DATEN Logic “0” Current (V INL = Logic “1” Current ...

Page 4

AD8321 ABSOLUTE MAXIMUM RATINGS* Supply Voltage +V S Pins 17 ...

Page 5

GAIN CONTROL – Decimal Figure 4. Gain Error vs. Gain Control ...

Page 6

AD8321 34 MAX GAIN P = 11dBm OUT 10pF 0pF 20pF 50pF 100 FREQUENCY – MHz Figure 13. AC Response for ...

Page 7

OPERATIONAL DESCRIPTION The AD8321 is a digitally controlled variable gain power ampli­ fier that is optimized for driving cable multifunc­ tional bipolar device on a single silicon die, it incorporates all the analog features necessary ...

Page 8

AD8321 The attenuation setting in the AD8321 is determined by the 8-bit word in the data latch. The SDATA load sequence is initiated by a falling edge on DATEN. The gain control data (SDATA) is serially loaded (MSB first) into ...

Page 9

Basic Connection Figure 25 shows the basic schematic for operating the AD8321 in single-ended inverting mode. To operate in inverting mode, connect the input signal through an ac coupling capacitor to VIN–; VIN+ should be decoupled to ground with a ...

Page 10

AD8321 Varying the Gain and SPI Programming The gain of the AD8321 can be varied over a range from approximately – +26 dB, in increments of approximately 0.7526 dB per LSB. Programming the gain of ...

Page 11

Distortion and DOCSIS Care must be taken when selecting attenuation levels specified in Table I as the output signal from the AD8321 must compen­ sate for the losses resulting from any added attenuation as well as the insertion losses associated ...

Page 12

AD8321 Differential Input Option 2: Install the Mini-Circuits T1-6T­ KK81 1:1 transformer in the T1 location of the evaluation board. Jumpers J1, J2 and J3 should be applied pointing in the direction of the transformer. Apply an open circuit in ...

Page 13

TP1 C1 0.1�F J3 VIN– R1 82.5� TP4 VCC TP6 SDATA P1–5 TP7 R6 CLK P1–6 TP8 DATEN P1–2 TP9 PD P1– C14 C15 10�F 0.1�F TP5 GND V CC C10 C6 0.1�F 10�F R8 1k� V1 P1–8 ...

Page 14

AD8321 EVALUATION BOARD FEATURES AND OPERATION Figure 29. Evaluation Board Software Installation Figure 30. Evaluation Board Control Software –14– REV. A ...

Page 15

Figure 31. Screen Display of Windows-Based Control Software REV. A –15– AD8321 ...

Page 16

AD8321 Figure 32. Evaluation Board Silkscreen (Component Side) –16– REV. A ...

Page 17

Figure 33. Evaluation Board Layout (Component Side) REV. A Figure 34. Evaluation Board Layout (Solder Side) –17– AD8321 ...

Page 18

AD8321 AD8321 Evaluation Board Rev. B SINGLE- ENDED INVERTING INPUT March 17, 1999 Qty. Description 1350 size tantalum chip capacitor 2 0 1206 size ceramic chip capacitor 14 3 1,000 ...

Page 19

Revision History Location 6/05—Data Sheet Changed from REV REV. A. Changes to ORDERING GUIDE ....................................................................................................................................................4 Updated OUTLINE DIMENSIONS.............................................................................................................................................19 REV. A OUTLINE DIMENSIONS 20-Lead Standard Small Outline Package [SOIC_W] Wide Body (R-20) Dimensions shown in millimeters and (inches) –19– ...

Page 20

–20– ...

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