M48T201V-70MH1 STMICROELECTRONICS [STMicroelectronics], M48T201V-70MH1 Datasheet - Page 13

• Manufacturer Part Number: M48T201V-70MH1
• Description: 3.3V-5V TIMEKEEPER CONTROLLER
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Data Retention Mode
With valid V
accessed as described above with READ or
WRITE cycles. Should the supply voltage decay,
the M48T201Y/V will automatically deselect, write
protecting itself (and any external SRAM) when
V
This is accomplished by internally inhibiting ac-
cess to the clock registers via the E signal. At this
time, the Reset pin (RST) is driven active and will
remain active until V
External RAM access is inhibited in a similar man-
ner by forcing E
within 0.2V of the V
level as long as V
ance condition. When V
the battery (V
the V
clock registers are maintained from the attached
battery supply. External RAM is also powered by
the SNAPHAT battery. All outputs except G
E
pedance. The V
CC
CON
falls between V
, RST, IRQ/FT and V
CC
pin to the SNAPHAT
CC
BAT
applied, the M48T201Y/V can be
CON
OUT
), power input is switched from
CC
BAT
CC
PFD
to a high level. This level is
pin is capable of supplying
remains at an out-of-toler-
. E
CC
returns to nominal levels.
(max) and V
CON
falls below the level of
OUT
, become high im-
®
will remain at this
battery and the
PFD
(min).
CON
,
100µA of current to the attached memory with less
than 0.3V drop under this condition. On power up,
when V
tion continues for 200ms (max) by inhibiting E
The RST signal also remains active during this
time (see
Note: Most low power SRAMs on the market to-
day can be used with the M48T201Y/V TIME-
KEEPER
some criteria which should be used in making the
final choice of an SRAM to use.
The SRAM must be designed in a way where the
chip enable input disables all other inputs to the
SRAM. This allows inputs to the M48T201Y/V and
SRAMs to be “Don't care” once V
V
data retention down to V
able access time must be sufficient to meet the
system needs with the chip enable (and output en-
able) output propagation delays included.
PFD
(min). The SRAM should also guarantee
CC
®
Figure 15., page
returns to a nominal value, write protec-
SUPERVISOR. There are, however
M48T201Y, M48T201V
CC
27).
= 2.0V. The chip en-
CC
falls below
13/33
CON
.