MAX5174AEEE MAXIM [Maxim Integrated Products], MAX5174AEEE Datasheet - Page 13

• Manufacturer Part Number: MAX5174AEEE
• Description: Low-Power, Serial, 12-Bit DACs with Voltage Output
• Manufacturer: MAXIM [Maxim Integrated Products]

Figure 6. Unipolar Output Circuit (Rail-to-Rail)
Figure 7. Setting OS for Output Offset
Figure 8. Bipolar Output Circuit
TOLERANCES: 10k ±0.1%
REF
DAC
MAX5174
MAX5176
REF
REF
+5V/+3V
DAC
DGND
V
MAX5174
MAX5176
DAC
DD
MAX5174
MAX5176
________________________________________________________________________________________13
AGND
AGND
AGND
+5V/+3V
V
+5V/+3V
DD
OUT
OS
V
DD
10k
DGND
DGND
OS
Low-Power, Serial, 12-Bit DACs
OS
10k
V+
V-
OUT
OUT
V
OS
V
OUT
The simple circuit of Figure 7 illustrates how to intro-
duce an offset to the output voltage. The amount of off-
set introduced by a voltage at the OS pin is shown in
the following equation:
where Gain = 1.638.
However, the total output voltage of the device cannot
exceed V
To set the gain of the output amplifier to 1, connect OS
to OUT.
The serial-data output pin (DOUT) allows multiple
MAX5174/MAX5176s to be daisy-chained together as
shown in Figure 9. The advantage of this is that only two
lines are needed to control all the DACs. The disadvan-
tage is that it takes n commands to program the DACs.
Figure 10 shows several MAX5174/MAX5176s sharing
one common DIN signal line. In this configuration the
data bus is common to all devices; however, more I/O
lines are required because each device needs a dedi-
cated CS line. The advantage of this configuration is
that only one command is needed to program any DAC.
Table 2. Unipolar Code Table
(Circuit of Figure 6)
Table 3. Bipolar Code Table
(Circuit of Figure 8)
MSB
MSB
11 1111 1111 11 (00)
10 0000 0000 01 (00)
10 0000 0000 00 (00)
01 1111 1111 11 (00)
00 0000 0000 01 (00)
00 0000 0000 00 (00)
11 1111 1111 11 (00)
10 0000 0000 01 (00)
10 0000 0000 00 (00)
01 1111 1111 11 (00)
00 0000 0000 01 (00)
00 0000 0000 00 00
DAC CONTENTS
DAC CONTENTS
with Voltage Output
DD
, regardless of the voltage on the OS pin.
Offset and Buffer Configurations
V
OFFSET
LSB
LSB
= V
Daisy-Chaining Devices
OS
+V
+V
+V
+V
+V
+V
+V
+V
+V
+V
· (1- Gain)
REF
REF
REF
REF
REF
REF
REF
REF
ANALOG OUTPUT
ANALOG OUTPUT
REF
REF
(4095/4096)
(2049/4096)
(2048/4096)
(2047/4096)
[(2 · 4095/4096) - 1]
[(2 · 2049/4096) - 1]
[(2 · 2048/4096) - 1]
[(2 · 2047/4096) - 1]
(1/4096)
[(2 · 1/4096) - 1]
-V
0
REF
·
1.638
·
·
·
·
1.638
1.638
1.638
1.638