MAXQ3210-EJX MAXIM [Maxim Integrated Products], MAXQ3210-EJX Datasheet - Page 19

no-image

MAXQ3210-EJX

Manufacturer Part Number
MAXQ3210-EJX
Description
Microcontroller with Internal Voltage Regulator, Piezoelectric Horn Driver, and Comparator
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAXQ3210-EJX
Manufacturer:
MAXIM/美信
Quantity:
20 000
The watchdog timer functions are described in the
MAXQ Family User’s Guide. Software can determine if
a reset is caused by a watchdog timeout by checking
the Watchdog Timer Reset Flag (WTRF) in the WDCN
register. Execution resumes at location 8000h following
a watchdog timer reset.
Asserting the external RESET pin low causes the
device to enter the reset state. The external reset func-
tions as described in the MAXQ Family User’s Guide.
Execution resumes at location 8000h after the RESET
pin is released. The external system reset function is
enabled by default on a power-on reset, but can be
disabled and the pin used as general-purpose I/O by
setting the Reset Pin Disable (RSTD) bit. The system
designer is cautioned not to disable the reset pin early
in the software as it could disable future JTAG access
and/or bootloader capability.
Figure 3. Type D Port Pin Schematic
Microcontroller with Internal Voltage Regulator,
Piezoelectric Horn Driver, and Comparator
PI.x OR SF INPUT
SF DIRECTION
FLAG
SF OUTPUT
SF ENABLE
PD.x
PO.x
INTERRUPT
External System Reset
FLAG
Watchdog Timer Reset
CIRCUIT
DETECT
____________________________________________________________________
EIES.x
The microcontroller uses a form of Type D bidirectional
I/O pins described in the MAXQ Family User’s Guide.
Each port has eight independent, general-purpose I/O
pins and three configure/control registers. Many pins
support alternate functions such as timers or interrupts,
which are enabled, controlled, and monitored by dedi-
cated peripheral registers. Using the alternate function
automatically converts the pin to that function. The I/O
pins on this device employ an optional “keeper” latch
that helps to maintain the input pin state in the absence
of external drive sources.
Port 0.7 is a special pin with a stronger pulldown capa-
bility to drive devices such as LEDs. It operates and is
configured the same as other pins.
Type D port pins have Schmitt Trigger receivers and
full CMOS output drivers, and can support special
functions. The pin is either tri-stated or weak pullup
when defined as an input, dependent on the state of
the corresponding bit in the output register. One pin of
the device has interrupt capability.
MAXQ3210
I/O PAD
V
DDIO
WEAK
V
DD
PIN.x
I/O Ports
19

Related parts for MAXQ3210-EJX