MAXQ3210-EJX MAXIM [Maxim Integrated Products], MAXQ3210-EJX Datasheet - Page 8

• Manufacturer Part Number: MAXQ3210-EJX
• Description: Microcontroller with Internal Voltage Regulator, Piezoelectric Horn Driver, and Comparator
• Manufacturer: MAXIM [Maxim Integrated Products]

Microcontroller with Internal Voltage Regulator,
Piezoelectric Horn Driver, and Comparator
The following is an introduction to the primary features
of the microcontroller. More detailed descriptions of the
device features can be found in the data sheets, errata
sheets, and user’s guides described later in the
Additional Documentation section.
The MAXQ3210 is a low-cost, high-performance,
CMOS, fully static, 16-bit RISC microcontroller with
EEPROM and an integrated piezoelectric horn driver
and analog comparator. It is structured on a highly
advanced, 8-bit accumulator-based, 16-bit RISC archi-
tecture. Fetch and execution operations are completed
in one cycle without pipelining, because the instruction
contains both the op code and data. The result is a
streamlined 3.58 million instructions-per-second (MIPS)
microcontroller.
A 4-level hardware stack, enabling fast subroutine call-
ing and task switching, supports the highly efficient
core. Data can be quickly and efficiently manipulated
with three internal data pointers. Multiple data pointers
allow more than one function to access data memory
without having to save and restore data pointers each
time. The data pointers can automatically increment or
decrement before or after an operation, eliminating the
need for software intervention. As a result, the applica-
tion speed is greatly increased.
8
9V
5V
_____________________________________________________________________
EXTERNAL RC OR RESONATOR
EXTERNAL OSCILLATOR/
EXTERNAL CRYSTAL/
PIEZOELECTRIC
COMPARATOR
HORN DRIVER
MAXQ Core Architecture
REGULATOR
VOLTAGE
Detailed Description
128B EEPROM
(DATA)
POR
(16 x 8-BIT ACCUMULATORS)
2kWORD UTILITY ROM
MAXQ10 RISC CORE
POWER REDUCTION/
CLOCK GENERATION
1kWORD EEPROM
(PROGRAM)
WATCHDOG
The instruction set is composed of fixed-length, 16-bit
instructions that operate on registers and memory loca-
tions. The instruction set is highly orthogonal, allowing
arithmetic and logical operations to use any register
along with the accumulator. Special-function registers
control the peripherals and are subdivided into register
modules. The family architecture is modular, so that
new devices and modules can often reuse code devel-
oped for existing products.
The architecture is transport-triggered. This means that
writes or reads from certain register locations can trig-
ger other associated operations. These operations form
the basis for the higher-level instructions defined by the
assembler, such as ADDC, OR, JUMP, etc. The op
codes are actually implemented as MOVE instructions
between certain register locations, while the assembler
handles the encoding, which need not be a concern to
the programmer.
The 16-bit instruction word is designed for efficient exe-
cution. Bit 15 indicates the format for the source field of
the instruction. Bits 0 to 7 of the instruction represent the
source for the transfer. Depending on the value of the
format field, this can either be an immediate value or a
source register. If this field represents a register, the
lower four bits contain the module specifier and the
upper four bits contain the register index in that module.
Bits 8 to 14 represent the destination for the transfer.
This value always represents a destination register,
with the lower four bits containing the module specifier
TIMERS
64B SRAM
(DATA)
JTAG
Functional Diagram
TMS, TDI,
TDO, TCK
Instruction Set
16-BIT TIMER/COUNTER
WITH PRESCALER
HIGH-CURRENT
MAXQ3210
LED DRIVER
GPIO