74LVX27 STMICROELECTRONICS [STMicroelectronics], 74LVX27 Datasheet

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74LVX27

Manufacturer Part Number
74LVX27
Description
LOW VOLTAGE CMOS TRIPLE 3 INPUT NOR GATE WITH 5V TOLERANT INPUTS
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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74LVX273M
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DESCRIPTION
The 74LVX27 is a low voltage CMOS TRIPLE
3-INPUT NOR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
HIGH SPEED :
t
5V TOLERANT INPUTS
INPUT VOLTAGE LEVEL :
V
LOW POWER DISSIPATION:
I
LOW NOISE:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 27
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
PD
CC
PLH
OH
IL
OLP
CC
=0.8V, V
= 4.1ns (TYP.) at V
= 2 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 0.3V (TYP.) at V
t
PHL
OL
= 4mA (MIN)
IH
LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE
=2V at V
CC
A
CC
=25°C
CC
=3V
= 3.3V
= 3.3V
2
MOS
WITH 5V TOLERANT INPUTS
ORDER CODES
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVX27M
TUBE
74LVX27
TSSOP
74LVX27MTR
74LVX27TTR
T & R
1/8

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