AD9775EB AD [Analog Devices], AD9775EB Datasheet - Page 19

• Manufacturer Part Number: AD9775EB
• Description: 14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter
• Manufacturer: AD [Analog Devices]

The offset control defines a small current that can be added to
I
tion of which I
programmable via Register 08h, Bit 7 (IDAC) and Register 0Ch,
Bit 7 (QDAC). Figure 8 shows the scale of the offset current
that can be added to one of the complementary outputs on the
IDAC and QDAC. Offset control can be used for suppression of
LO leakage resulting from modulation of dc signal components.
If the AD9775 is dc-coupled to an external modulator, this
feature can be used to cancel the output offset on the AD9775
as well as the input offset on the modulator. Figure 9 shows a
typical example of the effect that the offset control has on LO
suppression.
Figure 6. DAC Outputs, Reference Current Scaling, and
Gain/Offset Adjust
REV. 0
REGISTERS
OUTA
REFIO
CONTROL
1.2VREF
0.1 F
GAIN
or I
25
20
15
10
Figure 7a. Coarse Gain Effect on I
5
0
OUTB
0
RSET1
FSADJ1
(not both) on the IDAC and QDAC. The selec-
OUT
GAIN
GAIN
COARSE GAIN REGISTER CODE – Assuming
FINE
DAC
FINE
DAC
this offset current is directed toward is
5
RSET2
COARSE
GAIN
2R MODE
FSADJ2
DAC
RSET1, 2 = 1.9k
COARSE
10
GAIN
REGISTERS
DAC
CONTROL
GAIN
1R MODE
REGISTERS
REGISTERS
QDAC
IDAC
CONTROL
CONTROL
15
OFFSET
OFFSET
FULLSCALE
OFFSET
OFFSET
DAC
DAC
20
I
I
I
I
OUTA1
OUTB1
OUTA2
OUTB2
–19–
In Figure 9, the negative scale represents an offset added to
I
I
IDAC, while Offset Register 2 corresponds to QDAC. Figure 9
represents the AD9775 synthesizing a complex signal that is then
dc-coupled to an AD8345 quadrature modulator with an LO of
800 MHz. The dc-coupling allows the input offset of the
AD8345 to be calibrated out as well. The LO suppression at
the AD8345 output was optimized first by adjusting Offset
Register 1 in the AD9775. When an optimal point was found
(roughly Code 54), this code was held in Offset Register 1, and
Offset Register 2 was adjusted. The resulting LO suppression
is 70 dBFS. These are typical numbers and the specific code for
optimization will vary from part to part.
OUTB
OUTA
, while the positive scale represents an offset added to
of the respective DAC. Offset Register 1 corresponds to
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0
5
4
3
2
1
0
Figure 7b. Fine Gain Effect on I
0
0
Figure 8. DAC Output Offset Current
COARSE GAIN REGISTER CODE – Assuming
FINE GAIN REGISTER CODE – Assuming
200
5
400
RSET1, 2 = 1.9k
RSET1, 2 = 1.9k
2R MODE
2R MODE
10
600
1R MODE
FULLSCALE
15
800
1R MODE
AD9775
1000
20