ADC774JH BURR-BROWN [Burr-Brown Corporation], ADC774JH Datasheet - Page 5

• Manufacturer Part Number: ADC774JH
• Description: Microprocessor-Compatible ANALOG-TO-DIGITAL CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

TABLE II. Control Input Truth Table.
CONTROLLING THE ADC774
This is an abridged data sheet. For Discussion of Specifica-
tions, Installation, Calibration refer to ADC574A data sheet
or order PDS-835.
The Burr-Brown ADC774 can be easily interfaced to most
microprocessor systems and other digital systems. The
microprocessor may take full control of each conversion, or
the converter may operate in a stand-alone mode, controlled
only by the R/C input. Full control consists of selecting an
8- or 12-bit conversion cycle, initiating the conversion, and
reading the output data when ready—choosing either 12 bits
all at once, or 8 bits followed by 4 bits in a left-justified
format. The five control inputs (12/8, CS, A
are all TTL-/CMOS-compatible. The functions of the con-
trol inputs are described in Table I. The control function
truth table is listed in Table II.
Read footnote 5 to the Electrical Specifications table if
using ADC774 to replace the HI-774.
STAND-ALONE OPERATION
For stand-alone operation, control of the converter is ac-
complished by a single control line connected to R/C. In this
mode CS and A
and 12/8 are connected to V
are presented as 12-bit words. The stand-alone mode is used
in systems containing dedicated input ports which do not
require full bus interface capability.
TABLE I. ADC774 Control Line Functions.
DESIGNATION
CE (Pin 6)
CS (Pin 3)
R/C (Pin 5)
A
12/8 (Pin 2)
O
CE
0
X
1
1
1
1
1
1
1
(Pin 4)
PIN
CS
X
1
0
0
0
0
0
0
0
O
R/C
X
X
0
0
0
0
1
1
1
are connected to digital common and CE
DEFINITION
Chip Enable
(active high)
Chip Select
(active low)
Read/Convert
(“1” = read)
(“0” = convert)
Byte Address
Short Cycle
Data Mode Select
(“1” = 12 bits)
(“0” = 8 bits)
12/8
X
X
X
X
X
X
X
X
1
0
0
LOGIC
A
X
X
X
0
1
0
1
0
1
0
1
O
(+5V). The output data
OPERATION
None
None
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Enable 12-bit output
Enable 8 MSBs only
Enable 4 LSBs plus 4
trailing zeros
FUNCTION
Must be high (“1”) to either initiate a conversion or read output data. 0-1 edge may be used to initiate a
conversion.
Must be low (“0”) to either initiate a conversion or read output data. 1-0 edge may be used to initiate
a conversion.
Must be low (“0”) to initiate either 8- or 12-bit conversions. 1-0 edge may be used to initiate a
conversion. Must be high (“1”) to read output data. 0-1 edge may be used to initiate a read operation.
In the start-convert mode, A
output data in two 8-bit bytes, A
trailing “0s” (low byte).
When reading output data, 12/8 = “1” enables all 12 output bits simultaneously. 12/8 = “0” will enable the
MSBs or LSBs as determined by the A
O
, R/C, and CE)
5
O
FIGURE 1. R/C Pulse Low—Outputs Enabled After Con-
selects 8-bit (A
FIGURE 2. R/C Pulse High—Outputs Enabled Only While
TABLE III. Stand-Alone Mode Timing.
Conversion is initiated by a high-to-low transition of R/C.
The three-state data output buffers are enabled when R/C is
high and STATUS is low. Thus, there are two possible
modes of operation; conversion can be initiated with either
positive or negative pulses. In either case the R/C pulse
must remain low for a minimum of 50ns.
R/C
STS
DB11–DB0
SYMBOL PARAMETER
R/C
STS
DB11–
DB0
O
t
t
t
t
t
t
= “0” accesses 8 MSBs (high byte) and A
HRL
DS
HDR
HS
HRH
DDR
O
t
High-Z
line.
DDR
Low R/C Pulse Width
STS Delay from R/C
Data Valid After R/C Low
STS Delay After Data Valid
High R/C Pulse Width
Data Access Time
O
version.
R/C Is High.
= “1”) or 12-bit (A
t
HRH
Data Valid
Data Valid
t
HRL
t
DS
t
HDR
t
t
HDR
DS
O
= “0”) conversion mode. When reading
High-Z State
ADC774
MIN
150
50
25
O
High-Z State
= “1” accesses 4 LSBs and
TYP
t
150
C
t
C
MAX
200
375
150
Data Valid
t
HS
UNITS
ns
ns
ns
ns
ns
ns
®