PCM1741/E2K BURR-BROWN [Burr-Brown Corporation], PCM1741/E2K Datasheet - Page 13

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PCM1741/E2K

Manufacturer Part Number
PCM1741/E2K
Description
+3.3V Single-Supply, 24-Bit, 96kHz Sampling Enhanced Multilevel, Delta-Sigma, Audio DIGITAL-TO-ANALOG CONVERTER
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
PCM1741
REGISTER 19
DACx
DM12
DMF[1:0]
REGISTER 20
FMT[2:0]
SBAS175
DAC Operation Control
where x = 1 or 2, corresponding to the DAC output V
Default Value: 0
The DAC operation controls are used to enable and disable the DAC outputs, V
DACx = 0, the corresponding output will generate the audio waveform dictated by the data present on the
DATA pin. When DACx = 1, the corresponding output will be set to the bipolar zero level, or V
Audio Interface Data Format
Default Value: 101
The FMT[2:0] bits are used to select the data format for the serial audio interface. The following table shows
the available format options.
Digital De-Emphasis Function Control
Default Value: 0
The DM12 bit is used to enable or disable the Digital De-Emphasis function. Refer to the Typical Performance
Curves of this data sheet for more information.
Sampling Frequency Selection for the De-Emphasis Function
Default Value: 00
The DMF[1:0] bits are used to select the sampling frequency used for the Digital De-Emphasis function when
it is enabled.
B15
B15
DACx = 0
DACx = 1
DM12 = 0
DM12 = 1
DMF[1:0]
FMT[2:0]
0
0
000
001
010
011
100
101
110
111
00
01
10
11
IDX6
IDX6
B14
B14
IDX5
IDX5
B13
B13
De-Emphasis Disabled (default)
De-Emphasis Enabled
De-Emphasis Same Rate Selection
44.1kHz (default)
48kHz
32kHz
Reserved
DAC Operation Enabled (default)
DAC Operation Disabled
Audio Data Format Selection
24-Bit Standard Format, Right-Justified Data
20-Bit Standard Format, Right-Justified Data
18-Bit Standard Format, Right-Justified Data
16-Bit Standard Format, Right-Justified Data
I
Left-Justified Format, 16- to 24-Bits (default)
Reserved
Reserved
2
S Format, 16- to 24-bits
IDX4
IDX4
B12
B12
IDX3
IDX3
B11
B11
IDX2
IDX2
B10
B10
IDX1
IDX1
B9
B9
IDX0
IDX0
B8
B8
OUT
RSV
RSV
B7
B7
L (x = 1) or V
DMF1
RSV
B6
B6
DMF0
FLT
B5
B5
OUT
R (x = 2).
DM12
RSV
B4
B4
OUT
RSV
RSV
B3
B3
L and V
FMT2
RSV
B2
B2
OUT
DAC2 DAC1
FMT1
B1
B1
R. When
CC
/2.
FMT0
B0
B0
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