PCM1741/E2K BURR-BROWN [Burr-Brown Corporation], PCM1741/E2K Datasheet - Page 9

• Manufacturer Part Number: PCM1741/E2K
• Description: +3.3V Single-Supply, 24-Bit, 96kHz Sampling Enhanced Multilevel, Delta-Sigma, Audio DIGITAL-TO-ANALOG CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

PCM1741
AUDIO SERIAL INTERFACE
The audio serial interface for the PCM1741 is comprised of
a 3-wire synchronous serial port. It includes LRCK (pin 3),
BCK (pin 1), and DATA (pin 2). BCK is the serial audio bit
clock, and is used to clock the serial data present on DATA
into the audio interface’s serial shift register. Serial data is
clocked into the PCM1741 on the rising edge of BCK.
LRCK is the serial audio left/right word clock used to latch
serial data into the serial audio interface’s internal registers.
Both LRCK and BCK should be synchronous to the
system clock. Ideally, it is recommended that LRCK and
BCK be derived from the system clock input, SCK. LRCK
is operated at the sampling frequency, f
operated at 32, 48, or 64 times the sampling frequency (I
format except BCK = 32f
PCM1741 is synchronized with LRCK. Accordingly, it is
FIGURE 3. Audio Data Input Formats.
SBAS175
(1) Standard Data Format: L-Channel = HIGH, R-Channel = LOW
(2) I
(3) Left-Justified Data Format: L-Channel = HIGH, R-Channel = LOW
16-Bit Right-Justified, BCK = 48f
16-Bit Right-Justified, BCK = 32f
18-Bit Right-Justified
20-Bit Right-Justified
24-Bit Right-Justified
2
S Data Format: L-Channel = LOW, R-Channel = HIGH
(= 32, 48 or 64f
(= 32, 48 or 64f
(= 48 or 64f
LRCK
DATA
DATA
DATA
DATA
DATA
LRCK
DATA
LRCK
BCK
DATA
BCK
BCK
S
)
S
S
)
)
14 15 16
14 15 16
16 17 18
18 19 20
22 23 24
S
). Internal operation of the
S
S
or 64f
MSB
MSB
MSB
MSB
1
1
1
1
S
2
2
2
2
3
3
3
3
S
MSB
. BCK may be
L-Channel
1
L-Channel
2
L-Channel
MSB
N-2 N-1 N
3
1
N-2 N-1 N
2
LSB
LSB
MSB
1
3
2
2
S
3
14 15 16
14 15 16
16 17 18
18 19 20
22 23 24
held when the sampling rate clock of LRCK is changed or
SCK and/or BCK is broken at least for one clock cycle. If
SCK, BCK, and LRCK are provided continuously after this
hold condition, the internal operation will be resynchronized
automatically, less than 3/f
period, and following 3/f
bipolar zero level, or V
AUDIO DATA FORMATS AND TIMING
The PCM1741 supports industry-standard audio data formats,
including Standard, I
Figure 3. Data formats are selected using the format bits,
FMT[2:0], in Control Register 20. The default data format is
24-bit left justified. All formats require Binary Two’s Comple-
ment, MSB-first audio data. See Figure 4 for a detailed timing
diagram of the serial audio interface.
1/f
LSB
LSB
LSB
LSB
LSB
S
1/f
MSB
1
MSB
1
S
1/f
MSB
MSB
1
1
S
2
2
2
2
3
3
3
3
R-Channel
R-Channel
MSB
1
2
N-2 N-1 N
N-2 N-1 N
MSB
3
R-Channel
1
CC
2
LSB
2
S, and Left-Justified, as shown in
LSB
/2. External resetting is not required.
MSB
1
S
, analog output is forced to the
2
S
3
period. In this resynchronize
1
14 15 16
14 15 16
18 19 20
22 23 24
1
2
17 18
2
LSB
LSB
LSB
LSB
LSB
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